LCD行业-富相科技-LCD液晶显示器驱动系統.pptx

液晶顯示器驅動系統講師 :課程大綱 液晶物質簡介 液晶的電光效應 液晶基本驅動原理 STN LCDs 驅動原理 TFT LCDs 驅動原理 影響TFT LCDs 畫面品質的因素 Driver IC 簡介 TFT LCDs 模組及介面技術簡介液晶物質的相變化固體結晶液晶液體加熱加熱冷卻冷卻液晶分子的種類Smectic LC 層狀液晶Nematic LC 線狀液晶Cholesteric LC膽固醇狀液晶液晶分子的排列CrystallineLiquid CrystallineLiquid K SmC SmA N LBiaxialUnaxialIsotropicTemperature液晶的分類層狀液晶Smectic線狀液晶Nematic膽固醇狀液晶Cholesteric液晶分子排列狀態熱 致 性 液 晶Thermotropic溶 致 性 液 晶Lyotropic液 晶形 成 方 式液晶的電光特性 異向性 (Anisotropic) 排列因數 ( ) 折射率 ( ) 黏滯係數 ( ) 介電係數 ( ) 電導係數 磁化率 彈性係數 ( )oennn/332211,nS液晶的光學特性Optical PositiveOptical NegativeHelical AxisOptical AxisOptical Axis nno/nne nne222/nnnoonenonen液晶驅動原理電極電極液晶Field OFFField ON0/液晶顯示器主要優缺點 優點 低電壓驅動。 低消耗電流。 體積薄，重量輕。 可實現大面積化。 彩色化容易。 缺點 視角限制。 外加被光源或投射光源。 溫度操作範圍限制。液晶顯示器的種類 液晶顯示器扭轉型 (Twinst Nematic, TN) 1971超扭轉型 (Super Twinst Nematic, STN) 1984 雙層雙扭轉型 (Double Layer STN, DSTN)1987 光相位補償超扭轉型 (Film STN, FSTN)1988 主動驅動超扭轉型 (AASTN or MLS STN) 1992強介電型 (Ferroelectric Liquid Crystal : FLC) 1980PDLC (Polymer Dispersive LC) 1988 PSCT (Polymer Stabilized Cholesteric Texture) 1993Other DS (Dynamic Scattering) 1968 PC (Phase Change) 1968 GH (Guest Host) 1968 ECB (Elcetrical Control Birefregency) 1971BTN (Bistable Twist Nematic) 1995IPS (In Plane Switch) 1995VA (Vertical Alignment)1996TN 型 LCDs 顯示原理Twist 90液晶分子Field OFFField ON利用液晶的旋光特性調變穿透光線液晶的旋光特性消失STN LCDs 顯示原理Twist 270液晶分子Field OFFField ON利用液晶的雙折射特性調變穿透光線TN & STN 電光轉移曲線V-T Curve100%90%10%VnsSTN VsSTNVsTNVnsTNTVTN 與 STN 的電壓漂移T100%VV2T1TTN ModeT100%VV2T1TSTN ModeLCDs 驅動方式直接驅動法 (Direction Addressing)靜態驅動法 (Static Addressing)多工驅動法 (Multiplex Addressing)主動驅動法 (Active Addressing / Multi-Line Selection)主動矩陣驅動法 (Active Matrix Addressing)兩端元件 (MIM, Diode.)三端元件 (A-Si:H TFT, Ploy-Si TFT .)Plasma Addressing (PALC)熱掃描驅動法 (雷射掃描)光掃描驅動法 (電子速掃描LCDs 靜態驅動法LC CellXORVsVcVsigVcVsigVcVsVc-VsONOFF多工驅動法 (振幅選擇驅動法, APT)1 2 3 4N 1 2 3Frame 1Frame 2F0T水平掃描訊號+D-D0垂直影像訊號Row 1Row 2Row 3Row NColumn 1ONOFFONOFFF+DF-DF+DF-D+D-D0+D-D0+D-D0+D-D01 2 3 4NFrame 1液晶畫素電壓TNDNDFON221NDNDFOFF221OFFONSR NDFopt11NNSRopt多工驅動法的限制NBiasS.R.21:22.2331:21.7331:31.9241:31.7381:41.45161:51.29321:71.2641:91.151001:111.111281:121.092001:151.082401:161.064001:171.061.01.11.21.3100200APT 驅動波形432105432106543210N=10N=20N=30=1.387=1.255=1.172=1.000=1.000=1.000IAPT 驅動波形水平電壓波形垂直電壓波形液晶畫素電壓波形0+F0+D-DF+D-D+D-(F+D)F+D-D+D-(F+D)F+D+D+F0+2D0F-DF+D正極性驅動負極性驅動正極性驅動波形偏移+D負極性驅動電壓偏移+FAPT AddressingIAPT AddressingAPT 與 IAPT 方式比較 APT Addressing Low Voltage Segment Driver : 2D High Voltage Common Driver : 2F IAPT Addressing Offset +D for Positive Polarity Offset +F for Negative Polarity Voltage Range of Segment Driver : F+D Voltage Range of Common Driver : F+D高容量多工驅動的對策(a)(b)(c)(d)(e)STN LCDs 規格11%1001%10011111090NNSRSRVVNVDBDNDFVoptlcdlcdOperation Voltage Vop :Bias Ratio : Steepness : NDNDFON221NDNDFOFF221OFFONSR NDFoptSelection Ratio : STN LCDs 驅動電壓計算If Voff=2V, N=240 rows, Then : 07.114.268.23120.2248.135.1240239115112222SRVONVVDNVVFVDDDNDNDNOFFVonLCDoff APT : Segment Driver : 2.96V, Common Driver : 44.40VIAPT : Segment & Common Drivers : 23.68VSTN LCDs Drivers 架構電源電壓Vlcd接地RRRR(F/D-3)RF+DFF-D2DD0.移位暫存器(Shifter Register)DCLK串列輸入訊號.閂鎖暫存器(Latch Register)LPF+D 0F-D 2D偏壓位準.DF(HLHL.H).HLHH並列輸出垂直訊號電極2D 02D2DIAPT 參考電壓IAPT 驅動 IC灰階顯示 FRCFrame Rate Control, FRC : 1stFrame 2ndFrame 3rdFrame 4thFramePixel 1Pixel 2Pixel 3Pixel 4Pixel 55/5 ON4/5 gray3/5 gray2/5 gray1/5 OFFResultTime灰階顯示 PWMPulse Width Modulation, PWM :垂直影像訊號電壓波形水平掃描電壓波形液晶畫素電壓波形Tf1-fD-DFF+DF-D+D-D00灰階顯示 PHMPulse High Modulation, PHM : 垂直影像訊號電壓波形水平掃描電壓波形Tf1-f+D-DFF+DF-D+D-D00+D-DXYPWMPHM液晶畫素波形液晶畫素波形T/2T/2液晶的頻率響應10 100 1k 10k 100k1.031.021.011.000.990.980.970.96正規化處理V50頻率Vertical Crosstalk of STN LCDsAB1HF-D+D-DF-D+D-D+D-DFrame NFrame N+10F+D-D+D-D正極性驅動波形負極性驅動波形水平脈波垂直驅動波形液晶畫素電壓波形ABABVertical Crosstalk 的抑制 (一)1HF-D-DF-D+D-D+DFrame N0F+D+D-D正極性驅動波形水平脈波垂直驅動波形液晶畫素電壓波形ABABF-D+D+D-DF-D+D-D+D-DFrame N0F-D+D-D正極性負極性APT AddressingImprovement Addressing每兩條水平線變換一次驅動電壓極性Vertical Crosstalk 的抑制 (二)1HF-D-DF-D+D-D+DFrame N0F+D+D-D正極性驅動波形水平脈波垂直驅動波形液晶畫素電壓波形ABABF-D+D-DF-D-D+D-DFrame N0F-D+DAPT AddressingImprovement Addressing000FF0正極性驅動波形採用補償驅動週期Vertical Crosstalk 的抑制 (三)1HF-D-D-DFrame N0F+D+D-D水平脈波垂直驅動波形液晶畫素電壓波形Frame NF+DAPT AddressingIAPT Addressing-(F-D)+DF+D-(F+D)0F+D+2DF-DF+D0+2DF-DF+D0F-D-D-D+D-(F-D)+DF+D-(F+D)-F一條水平掃描線的掃描週期分割成兩部份，一半的掃描時間是採用正極性的驅動訊號，另一半的時間是採用負極性的驅動訊號。Horizontal Crosstalk of STN LCDs垂直驅動訊號L Line水平掃描波形液晶畫素波形(a)(b)(c)(d)ABABLHorizontal Crosstalk 的抑制垂直驅動訊號L Line水平掃描波形液晶畫素波形(a)(b)(c)(d)傳統驅動方式水平掃描補償波形補償之液晶畫素波形(e)(f)GVLABFrame Response of STN LCDs慢速液晶快速液晶+20V-20V16.6ms液晶畫素電壓光線穿透率WBActive Addressing for STN LCDs圖框週期tk=HF1(t)F2(t)F3(t)F4(t)F5(t)ON+1ON+1ON+1OFF-1OFF-1LCDs 矩陣tkG1(t)G1(t)=(+F1(t)-F2(t)+F3(t)-F4(t)+F5(t)/5Active Addressing 驅動電壓 NiiijjtFIctG1 tGtFtUjiij NmmmjjiitAINNtGtANNtFNNFOFF12112121Nc1If Voff=2V, N=240 rows, Then :F = 0.730 X 2V = 1.460V|G| = 0.954 X 2V = 21.909VOutput Range of Segment Driver is about 44V.Common Driver of Common Driver is about 3V.Segment Voltage of Active Addressing不同的元素相異數目 D 所對應的垂直驅動電壓位階N01234567892-10+13-1-1/3+1/3+14-1-1/20+1/2+15-1-3/5-1/5+1/5+3/5+16-1-4/6-2/60+2/6+2/6+17-1-5/7-3/7-1/7+1/7+3/7+5/7+18-1-6/8-4/8-2/80+2/8+4/8+6/8+19-1-7/9-5/9-3/9-1/9+1/9+3/9+5/9+7/9+1表一. 主動驅動法的垂直驅動電壓位階分佈 0112122212121VNFNNNVVNTDNTDNNNTDTDNNNTATINNtGOOkjkjkjkjNmkmkmjjActive Addressing 的矩陣運算列向量（Column）時間（Time）行向量（Row）Bit-Map Image MatrixRow Function Matrix時間（Time）列（Column）Column Voltage MatrixtGtGtGtGtGtGtGtGtGtGIFIIIIIIIIItFtFtFtFtFtFtFtFtFIFjijiiji333231232221131211333231232221131211333231232221131211矩陣運算方式行（Row）行向量（Row）列向量（Column）Bit-Map Image MatrixRow Vector時間（Time）列（Column）Time = tk行向量（Row）列向量（Column）第j列Row Function Matrix時間（Time）列（Column）Column Vector垂直序列運算Column Sequential時間序列運算Time SequentialColumn Sequential 硬體架構 NM圖框記憶體 NM圖框記憶體影像資訊 輸入IjNXOR陣列N加法邏輯陣列NM STN LCDs液晶層間隙4.5um液晶材料：低黏滯係數水平驅動函數唯讀記憶體Row Function ROMNSTN LCDs垂直驅動晶片TFT LCDs 垂直驅動晶片1轉2多工器2轉1解多工器Time Sequential 硬體架構 NM圖框記憶體 NM圖框記憶體影像資訊 輸入IjNXOR陣列N加法邏輯陣列水平驅動函數唯讀記憶體Row Function ROMN1轉2多工器2轉1解多工器NM圖框緩衝記憶體NM圖框緩衝記憶體NM STN LCDs液晶層間隙4.5um液晶材料：低黏滯係數STN LCDs垂直驅動晶片TFT LCDs 垂直驅動晶片N主動矩陣式液晶顯示器AM-LCDsTFT LCDs 等效電路Row DriversColumn DriverArrangement of Color Filter R G B R G BR G B R G BR G B R G BRBG RGBRBGRBG RGBRBGRBG RGBRBGRGGBRGGBRGGBRGGBRGW BRGW BRGW BRGW BStripe Triangle Pixel Structure of TFT LCDsClcCsClcCsCommonCommon (N-1)thScan Line (N-1)thScan LineNth Scan LineNth Scan LineCs on Common Mode Cs on Gate ModeCgdCgd液晶電容儲存電容掃描電極資料電極共通電極Mth Data LineMth Data Line資料電極掃描電極:Clc:Cs:Common:Cgd寄生電容液晶畫素電容:Clc+CsClcCsCommon1 (N-1)thScan LineNth Scan LineCs on Gate ModeCgdMth Data Line資料電極Common2Cs on Common 與 Cs on Gate 架構液晶畫素TFTGate LineData LineCsCs液晶畫素TFTCommonCommonGate LineData LineCsCs Cs on CommonCs on GateTiming Chart of TFT LCDsFrame TimeGate123NTimeTFT LCDs Driving Method1 2 3 4 512345Frame NColumnsLines+ + + + + + + + + + + + + + + + + + + + +1 2 3 4 512345Frame N+1 ColumnsLines 1 2 3 4 512345Frame NColumnsLines+ + + + + + + + + + + + +1 2 3 4 512345Frame N+1 ColumnsLines + + + + + + + + + 1 2 3 4 512345Frame NColumnsLines+ + +1 2 3 4 512345Frame N+1 ColumnsLines + + + + + + + + + + + + + + + + + + + 1 2 3 4 512345Frame NColumnsLines+ + +1 2 3 4 512345Frame N+1 ColumnsLines+ + + + + + + + + + + + + + + + + + + +Column InversionDot InversionRow InversionFrame InversionDirect Driving of TFT LCDs DC Bias of CommonGrayScale Voltage V0V1V2V3V4V5V6V7V7V6V5V4V3V2V1V01 Frame / 1 LineAC Modulation Addressing of TFT LCDsV0V1V2V3V4V5V6V7V7V6V5V4V3V2V1V0Common WaveformGraylevel Voltage1Frame / 1 LineTFT LCDs 的電光效應Direct AddressingT100%VVthVth:液晶的操作臨界電壓共通電極訊號位準正極性訊號時光電轉移曲線負極性訊號時光電轉移曲線Vth負極性時臨界電壓正極性時臨界電壓5V3.5V6.5VTFT LCDs 的電光效應AC AddressingT100%V5V-1.5VVthVth:液晶的操作臨界電壓 正極性訊號時共通電極訊號位準 負極性訊號時共通電極訊號位準正極性訊號時光電轉移曲線負極性訊號時光電轉移曲線VthTFT LCDs Driving Waveform Cs on Common (一)SourceDrainGateVgppVsppVgon-minVgoff-minVshVdhVslVdlVgdVghVglVgdCommonVstVst:影像訊號的直流位準TgTFT LCD 驅動波形 (Cs on Common, Common = DC Bias)TFT LCDs Driving Waveform Cs on Common (二)SourceDrainGateVgppVsppVgon-minVgoff-minVshVdhVslVdlVgdVghVglVctVstVgd Common WaveFormVcppTFT LCDs Driving Waveform Cs on Gate SourceDrainGateVgppVsppVgon-minVgoff-minVshVdhVslVdlVgdVghVglVgdCommonVstVst:影像訊號的直流位準VdVdTgVc:TFT 電容效應的影響PixelCgdCgsCsdCsdbCsdbVVVVVVpFCpFCpFCExCCCVCCCCCVCVgdglghghlgdsLCLCsgdghlgdsdLCsgdghlgdgd43. 13005. 08 . 02 . 005. 030102005. 0,8 . 0,2 . 0:液晶電容的效應 液晶電容 CLC 會隨液晶作用電壓的改變而變化，因此在驅動液晶時會有殘存的 DC 成份，其所造成的影響： Image Sticking. Picture Flicker. 液晶作用電壓大時，液晶分子趨向平行電場方向排列： 液晶作用電場小時，液晶分子趨向垂直電場方向排列：IIsgdghlgdsgdghlgdgdgdpCCCVCCCCVCVVV/二階驅動方式的效應CsClcCgdCsdCgsVctCh(N-1)Ch(N)Vs垂直影像訊號水平掃描訊號Vg水平掃描訊號VgVshVslVstVthVth正極性驅動負極性驅動負極性驅動正極性驅動資料驅動晶片輸出訊號電位液晶畫素電位Vct=Vst-VpVpBlack(+)White(+)White(+)Black(+)Black(-)Black(-)White(-)White(-)TFT 補償驅動法Ch(N-1)Ch(N)Vst=Vct影像訊號波形 Vs水平脈波掃描波形VgeVgeVghlCh(N-1)Ch(N)Vst影像訊號波形VsVge(+)Vge(-)VghlVghl sghlgdstgesghlgdstgeCVCCVCVCVCCVCV*sghlgdgeCVCV3 Level Addressing4 Level Addressing3 Level AddressingB(+)W(-)B(-)W(+)正極性負極性Vst=VctB(+)B(-)W(+)W(-)B(+)W(-)B(-)W(+) Vp=CgdVghl/Ct正極性負極性正極性Ct=Cs+Clc+Cgd負極性CsVge/CtCsVge/Ct4 Level AddressingVst=VctB(+)B(-)B(-)B(+)W(+)W(+)W(-)W(-)B(+)W(-)B(-)W(+)Vp(+)Vp(-)Vp=CgdVghl/CtCsVge(-)/CtCsVge(+)/Ct正極性負極性正極性負極性Ct=Cs+Clc+CgdCs on Gate 電壓補償方式經由 Cs 將前一條水平脈波的補償波形耦合到動作的液晶畫素, 補償 Cgd 造成的電壓漂移及改善液晶畫素內的直流電電壓殘餘. 經由 TFT 的 Cgd 造成的電壓漂移經由 TFT 的 Cgd 造成的電壓漂移Comparsion of Addressing MethodFrameLineColumnDotCommonModulationModulationDCDCOutputRange ofDataLow VoltageLow VoltageHigh Voltage High Voltage2-LevelDrivingVVVV3-LevelDrivingV(Note 1)V(Note 1)VV4-LevelDrivingVVXXV : 可使用 X : 不可使用Note 1: Common 必須採用 DC Mode 驅動表一 Driving MethodHorizontal Line CrosstalkGray LevelGray Level Black LevelCommon WaveformDifference of Effective Voltagein B LineSignal of A LineSignal of B LineABCscCscCscTFT SubstrateColor Filter SubstrateHorizontal Area CrosstalkCommon WaveformDifference of Effective Voltagein B LineSignal of A LineSignal of B LineV1V2V1V2ABVertical Area CrosstalkCsdCsdbCsdbPixelGate LineSource LineUpLowUpLowShading CrosstalkRgRgRgRgClcCsRgRgClcCsRgRgClcCsRsRsRsCgsCgsCgsIg*nIg*(n-1)Ig*(n-2)IgIgIgIg*nIg*(n-1)Ig*(n-2)IcIcIcIc*nIc*(n-1)Ic*(n-2)Ic*(n-3)IsIsIsIgIgIgCruuent FromGate Driver N-1Current FromGate Driver N Common PlateCurrent From Common Plate Connection圖2.7a Line Inverion Charging PathShading Crosstalk 的抑制RgRgRgRgClcCsRgRgClcCsRgRgClcCsRsRsRsCgsCgsCgsIgIgIgIcIcIcIsIsIsIgIgIgGate Driver N-1Gate Driver N Common PlateIg/2Ig/2Ig/2Ig/2Ig/2Ig/2Ig/2Ig/2Ic/2Ic/2Ic/2Ic/2圖2.7b Column/Dot Inversion Charging PathGate Pulse 的傳遞延遲Gate (Scan) Line 的等效阻抗為一連串的串聯 RC 網路，因此 Gate Pulse 在傳遞時會造成波形的傳遞延遲失真。RCRCRCRCNRCNeq22液晶畫素邊際電場效應(一)Reverse Tilt畫素電極鄰近電極共通電極VPVLVAVA VL : Disclination DisappearedVP LC Threshold VoltageReverse Tilt 液晶畫素邊際電場效應(二)TFT水平驅動電極垂直驅動電極RubbingDirectionDisclinationLineReverse TiltDomain改善方法1.增加液晶分子的 預傾角(Pretilt Angle)2.增加 Black Mask 的 遮蔽面積驅動 IC Scan DriverBidirectional Shift RegisterLevel Shift CircuitOutput BufferG1 G2 G3 .STVRSTVLCPVR/LVDDDVSSDVDDAVSSASTVRSTVLG1G2GxSerial In Serial Out Analog Data DriverSelectData jData j+1MultiplexerPro:Very simple. Fewer external connections.Con:Many analog inputs. Reduced pixel charging time.System Note : Sample clock : (Dot clock) / N, N Phases. Video Phase : NShift RegisterVideo InQiQi+1Variation on MultiplexerPro:Video Input.Con:Fast data line charging needed. Reduced pixel charging time.System Note: Shift Clock : (Dot Clock) / 3 for Mono. Video Phase : 3 for Mono.Sample and HoldSerial In Parallel OutAnalog Data Driver (一)Shift RegisterQiQi+1Qi+2Qi+3Video InTransferDouble Sample and Hold / Single PhaseSample NSample N+1Sample N+2TTTNN+1N+2Out N-1Out NOut N+1Pro:Video Input. Small load on fast sample-and-holds. Full line time to charge pixel.Con:Complex analog circuit. Physical size.System Note : Shift Clock : Dot Clock. Video Phase : Single Phase.Serial In Parallel OutAnalog Data Driver (二)Shift RegisterQiQi+1Video InTransferDouble Sample and Hold / Multi-PhasePor : Reduced operation frequency .System Note :Video In : NVideo Phase : NShift Clock : (Dot Clock) / N.Digital Data Driver (一)Shift RegisterDACDACDACDACDAC Serial Data BusDigital-to-analog ConvertersPor : Digital input.Con : Complex. Requires sufficient precision to correct for LC response variation.Shift RegisterCount Count Count Count CountRamp InSampled RampPor : Digital input. Programmable ramp.Con : Complex circuit. High speed digital circuits. Reduced pixel charging time.Digital Data Driver (二)Shift RegisterDecodeDecodeExternal Fixed voltages1-of-n SelectorSimple DACPro : Digital input. Programmable external voltages.Con : Complex circuit. High speed digital circuits. Many pass gates per data line.Digital Data Driver (三)D0 S0D1 S8D2 S16D3 S24D4 S32D5 S40 S48 S56 S64SCCT1 T2 T3 T4OUTV64 V56 V48 V40 V32 V24 V16 V8 V0Fig3. Sturcture of the SCOLT1 T2T3T476541234Fig4. Waveform of TMSV0V8Fig5. Output Waveform when data is 6nmnVmVVaveragejiAll Digital Circuit Gamma Correction of LCDXY取像元件取像電路顯像電路顯像元件攝像機測受像機測Analog Correction : 2 3 Segment Approach.Digital Correction : External fixed voltage. Gamma Correction Simple CaseXY取像元件取像電路顯像電路顯像元件攝像機測受像機測TransmissionVoltageThe Block Diagram of the TFT LCD ModuleCCFL BacklightTFT-LCDPANELTiming ControllerScan DriverData DriverRGBCLKHsxVsxTFTLCD ModuleThe TFT LCD Module Type Classified into two kinds by data driver Analog type TFT-LCD module The analog data drivers The analog interface to PC Only NEC Digital type TFT-LCD module The digital data drivers The ADC/ LVDS/PanelLink interface to PC MainstreamThe Analog InterfaceGraphicsControllerTFT-LCDPANELTiming ControllerScan DriverAnalog Data DriverHsVsAnalogRGBAnalogRGBCLKHsxVsxPreAmpLevelShifterControllerPLLPCAnalog ModuleTFTLCD ModuleOSDCCFL BacklightThe ADC InterfaceGraphicsControllerTFT-LCDPANELTiming ControllerScan DriverDigital Data DriverHsVsAnalogRGBDigitalRGBCLKHsxVsxADCBufferControllerPLLPCADC ModuleTFTLCD ModuleOSDCCFL BacklightThe LVDS/PanelLink InterfaceGraphicsControllerLVDS/PanelLinkTxLVDS/PanelLinkRxTFT-LCDPANELTiming ControllerScan DriverCABLEClockHsVsDigitalRGBDigitalRGBClockHsVsPCTFT-LCD ModuleDigital Data DriverCCFL BacklightAnalog/ADC/LVDS/PanelLink Analog Interface True Color Sampling Error Low Edge Sharpness Noise in the Analog Signal TransmissionAnalog/ADC/LVDS/PanelLink ADC Interface Mainstream in the Desktop LCD Monitor Interface Sampling Error Low Edge Sharpness Noise in the Analog Signal Transmission EMI Issue for High Resolution Format Low Image Quality and High CostAnalog/ADC/LVDS/PanelLink LVDS Interface Mainstream in the Notebook PC Interface High Edge Sharpness Reducing EMI & Number of Cable Line High Image Quality and Low Cost Short Transmission Length & Low Noise Margin Compatible Issue PanelLink Interface Application in the Desktop LCD Monitor Interface High Edge Sharpness Reducing EMI & Number of Cable Line High Image Quality and Low Cost Second Supply Source IssueAnalog/ADC/LVDS/PanelLinkTFT Module 設計考慮(一) 顯示的影像訊號時序規格(Image Format) 圖框重複率(Frame Rate) 水平掃描線掃描時間 TFT 的 ION/IOFF 電流 水平掃描脈線的RC時間常數 灰階誤差 直流漂移TFT Module 設計考慮(二) 選擇適合的驅動方式(Cs on Gate or COM) 選擇適合的極性轉換方式 驅動IC(Scan & Source)的選取 TFT LCDs 模組介面技術的選擇大面積高解析度 TFT LCDs