基于单片机的温度控制系统外文翻译.pdf

欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 外文原文：Design of the Temperature Control System Based on AT89C51 ABSTRACT The principle and functions of the temperature control system based on micro controller AT89C51 are studied,and the temperature measurement unit consists of the 1-Wire bus digital temperature sensor DS18B20.The system can be expected to detect the preset temperature,display time and save monitoring data.An alarm will be given by system if the temperature exceeds the upper and lower limit value of the temperature which can be set discretionarily and then automatic control is achieved,thus the temperature is achieved monitoring intelligently within a certain range.Basing on principle of the system,it is easy to make a variety of other non-linear control systems so long as the software design is reasonably changed.The system has been proved to be accurate,reliable and satisfied through field practice.KEYWORDS:AT89C51;micro controller;DS18B20;temperature 1 INTRODUCTION Temperature is a very important parameter in human life.In the modern society,temperature control(TC)is not only used in industrial production,but also widely used in other fields.With the improvement of the life quality,we can find the TC appliance in hotels,factories and home as well.And the trend that TC will better serve the who欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 le society,so it is of great significance to measure and control the temperature.Based on the AT89C51 and temperature sensor DS18B20,this system controls the condition temperature intelligently.The temperature can be set discretionarily within a certain range.The system can show the time on LCD,and save monitoring data;and automatically control the temperature when the condition temperature exceeds the upper and lower limit value.By doing so it is to keep the temperature unchanged.The system is of high anti-jamming,high control precision and flexible design;it also fits the rugged environment.It is mainly used in peoples life to improve the quality of the work and life.It is also versatile,so that it can be convenient to extend the use of the system.So the design is of profound importance.The general design,hardware design and software design of the system are covered.1.1 Introduction The 8-bit AT89C51 CHMOS microcontrollers are designed to handle high-speed calculations and fast input/output operations.MCS 51 microcontrollers are typically used for high-speed event control systems.Commercial applications include modems,motor-control systems,printers,photocopiers,air conditioner control systems,disk drives,and medic欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 ge conditions.This complete and thorough validation necessitates not only a well-defined process but also a proper environment and tools to facilitate and execute the mission successfully.Intel Chandler Platform Engineering group provides post silicon system validation(SV)of various micro-controllers and processors.The system validation process can be broken into three major parts.The type of the device and its application requirements determine which types of testing are performed on the device.1.2 The AT89C51 provides the following standard features 4Kbytes of Flash,128 bytes of RAM,32 I/O lines,two 16-bittimer/counters,a five vector two-level interrupt architecture,a full duple ser-ial port,on-chip oscillator and clock circuitry.In addition,the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes.The Idle Mode stops the CPU while allowing the RAM,timer/counters,serial port and interrupt sys-tem to continue functioning.The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.1.3Pin Description VCC Supply voltage.GND Ground.欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 Port 0：Port 0 is an 8-bit open-drain bi-directional I/O port.As an output port,each pin can sink eight TTL inputs.When 1s are written to port 0 pins,the pins can be used as high impedance inputs.Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory.In this mode P0 has internal pull ups.Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during program verification.External pull ups are required during program verification.Port 1：Port 1 is an 8-bit bi-directional I/O port with internal pull ups.The Port 1 output buffers can sink/so-urce four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pull ups and can be used as inputs.As inputs,Port 1 pins that are externally being pulled low will source current(IIL)because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and verification.Port 2：Port 2 is an 8-bit bi-directional I/O port with internal pull ups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pull ups and can be used as inputs.As inputs,Port 2 pins that are externally欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 being pulled low will source current(IIL)because of the internal pull ups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to Port 2 pins that are externally being pulled low will source current(IIL)because of the internal pull ups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses(MOVXDPTR).In this application,it uses strong internal pull-ups when emitting 1s.During accesses to external data memory that use 8-bit addresses(MOVX RI),Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals durin Flash programming and verification.欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 Port 3：Port 3 is an 8-bit bi-directional I/O port with internal pull ups.The Port 3 output buffers can sink/sou-rce four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pull ups and can be used as inputs.As inputs,Port 3 pins that are externally being pulled low will source current(IIL)because of the pull ups.Port 3 also serves the functions of various special features of the AT89C51 as listed below:RST：Reset input.A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/PROG：Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory.This pin is also the program pulse input(PROG)during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency,and may be used for external timing or clocking purposes.Note,however,that one ALE pulse is skipped duri-ng each access to external Data Memory.If desired,ALE operation can be disabled by setting bit 0 of SFR location 8EH.With the bit set,ALE is active only during a MOVX or MOVC instruction.Otherwise,the pin is weakly pulled high.Setting欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSEN：Program Store Enable is the read strobe to external program memory.When theAT89C51 is executing code from external program memory,PSEN is activated twice each machine cycle,except that two PSEN activations are skipped during each access to external data memory.EA/VPP：External Access Enable.EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.Note,however,that if lock bit 1 is programmed,EA will be internally latched on reset.EA should be strapped to VCC for internal program executions.This pin alsreceives the 12-volt programming enable voltage(VPP)during Flash programming,for parts that require 12-volt VPP.XTAL1：Input to the inverting oscillator amplifier and input to the internal clock operating circuit.XTAL2：Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output,respectively,of an inverting amplifier which can be configured for use as an on-chip oscil欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 lator,as shown in Figure 1.Either a quartz crystal or ceramic resonator may be used.To drive the device from an external clock source,XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal,since the input to the internal clocking circuitry is through a divide-by-two flip-flop,but minimum and maximum voltage high and low time specifications must be observed.Idle Mode In idle mode,the CPU puts itself to sleep while all the on chip peripherals remain active.The mode is invoked by software.The content of the on-chip RAM and all the special functions registers remain unchanged during this mode.The idle mode can be terminated by any enabled interrupt or by a hardware reset.It should be noted that when idle is terminated by a hard ware reset,the device normally resumes program execution,from where it left off,up to two machine cycles before the internal reset algorithm takes control.On-chip hardware inhibits access to internal RAM in this event,but access to the port pins is not inhibited.To eliminate the possibility of an unexpected write to a port pin when Idle is t欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 erminated by reset,the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.Power-down Mode In the power-down mode,the oscillator is stopped,and the instruction that invokes power-down is the last instruction executed.The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated.The only exit from power-down is a hardware reset.Reset redefines the SFRS but does not change the on-chip RAM.The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.The AT89C51 code memory array is programmed byte-by byte in either programming mode.To program any nonblank byte in the on-chip Flash Memory,the entire memory must be erased using the Chip Erase Mode.2 Programming Algorithm Before programming the AT89C51,the address,data and control signals should be set up according to the Flash programming mode table and Figure 3 and Figure 4.To program the AT89C51,take the following steps.1.Input the desired memory location on the address lines.2.Input the appropriate data byte on the data lines.3.Activate the correct combination of control signals.4.Raise EA/VPP to 12V for the high-v欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 oltage programming mode.5.Pulse ALE/PROG once to program a byte in the Flash array or the lock bits.The byte-write cycle is self-timed and typically takes no.翻译：温度控制系统的设计 摘要 欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 研究了基于 AT89C51 单片机温度控制系统的原理和功能，温度测量单元由单总线数字温度传感器 DS18B20 构成。该系统可进行温度设定，时间显示和保存监测数据。如果温度超过任意设置的上限和下限值，系统将报警并可以和自动控制的实现，从而达到温度监测智能一定范围内。基于系统的原理，很容易使其他各种非线性控制系统，只要软件设计合理的改变。该系统已被证明是准确的，可靠和满意通过现场实践。关键词：单片机；温度；温度 1 导言 温度是在人类生活中非常重要的参数。在现代社会中，温度控制（TC）不仅用于工业生产，还广泛应用于其它领域。随着生活质量的提高，我们可以发现在酒店，工厂和家庭，以及比赛设备。而比赛的趋势将更好地服务于整个社会，因此它具有十分重要的意义测量和控制温度。在 AT89C51 单片机和温度传感器 DS18B20 的基础上，系统环境温度智能控制。温度可设定在一定范围内动任意。该系统可以显示在液晶显示屏的时间，并保存监测数据，并自动地控制温度，当环境温度超过上限和下限的值。这样做是为了保持温度不变。该系统具有很高的抗干扰能力，控制精度高，灵活的设计，它也非常适合这个恶劣的环境。它主要应用于人们的生活，改善工作和生活质量。这也是通用的，因此它可以方便地扩大使用该系统。因此，设计具有深刻的重要性。一般的设计，硬件设计和软件系统的设计都包括在内。1.1 介绍 欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 8 位 AT89C51 CHMOS 工艺单片机被设计用于处理高速计算和快速输入/输出。MCS51 单片机典型的应用是高速事件控制系统。商业应用包括调制解调器，电动机控制系统，打印机，影印机，空调控制系统，磁盘驱动器和医疗设备。汽车工业把 MCS51 单片机用于发动机控制系统，悬挂系统和反锁制动系统。AT89C51 尤其很好适用于得益于它的处理速度和增强型片上外围功能集，诸如：汽车动力控制，车辆动态悬挂，反锁制动和稳定性控制应用。由于这些决定性应用，市场需要一种可靠的具有低干扰潜伏响应的费用-效能控制器，服务大量时间和事件驱动的在实时应用需要的集成外围的能力，具有在单一程序包中高出平均处理功率的中央处理器。拥有操作不可预测的设备的经济和法律风险是很高的。一旦进入市场，尤其任务决定性应用诸如自动驾驶仪或反锁制动系统，错误将是财力上所禁止的。重新设计的费用可以高达 500K 美元，如果产品族享有同样内核或外围设计缺陷的话，费用会更高。另外，部件的替代品领域是极其昂贵的，因为设备要用来把模块典型地焊接成一个总体的价值比各个部件高几倍。为了缓和这些问题，在最坏的环境和电压条件下对这些单片机进行无论在部件级别还是系统级别上的综合测试是必需的。Intel Chandler 平台工程组提供了各种单片机和处理器的系统验证。这种系统的验证处理可以被分解为三个主要部分。系统的类型和应用需求决定了能够在设备上执行的测试类型。1.2 AT89C51 提供以下标准功能 4k 字节 FLASH 闪速存储器，128 字节内部 RAM，32 个 I/O 口欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 线，2 个 16 位定时/计数器，一个 5 向量两级中断结构，一个全双工串行通信口，片内振荡器及时钟电路。同时，AT89C51 降至 0Hz 的静态逻辑操作，并支持两种可选的节电工作模式。空闲方式体制CPU 的工作，但允许 RAM，定时/计数器，串行通信口及中断系统继续工作。掉电方式保存 RAM 中的内容，但振荡器体制工作并禁止其他所有不见工作直到下一个硬件复位。1.3 引脚功能说明 Vcc：电源电压 GND：地 P0 口：P0 口是一组 8 位漏极开路型双向 I/O 口，也即地址/数据总线复用。作为输出口用时，每位能吸收电流的方式驱动 8 个 TTL 逻辑门电路，对端口写“1”可作为高阻抗输入端用。在访问外部数据存储器或程序存储器时，这组口线分时转换地址（低 8 位）和数据总线复用，在访问期间激活内部上拉电阻。在 Flash 编程时，P0 口接受指令字节，而在程序校验时，输出指令字节，校验时，要求外接上拉电阻。P1 口：P1 是一个带内部上拉电阻的 8 位双向 I/O 口，P1 的输出缓冲级可驱动（吸收或输出电流）4 个 TTL 逻辑门电路。对端口写“1”，通过内部的上拉电阻把端口拉到高电平，此时可作输入口。作为输入口使用时，因为内部存在上拉电阻，某个引脚被外部信号拉低时会输出一个电流（IIL）。Flash 编程和程序校验期间，P1 接受低8 位地址。欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 P2 口：P2 是一个带有内部上拉电阻的 8 位双向 I/O 口，P2 的输出缓冲级可驱动（吸收或输出电流）4 个 TTL 逻辑门电路。对端口写“1”，通过内部的上拉电阻把端口拉到高电平，此时可作输入口。作为输入口使用时，因为内部存在上拉电阻，某个引脚被外部信号拉低时会输出一个电流（IIL）。在访问外部程序存储器或 16 位四肢的外部数据存储器（例如执行 MOVX DPTR 指令）时，P2 口送出高 8 位地址数据，在访问 8 位地址的外部数据存储器（例如执行MOVX RI 指令）时，P2 口线上的内容（也即特殊功能寄存器（SFR）区中 R2 寄存器的内容），在整个访问期间不改变。Flash 编程和程序校验时，P2 也接收高位地址和其他控制信号。P3 口：P3 是一个带有内部上拉电阻的 8 位双向 I/O 口，P3 的输出缓冲级可驱动（吸收或输出电流）4 个 TTL 逻辑门电路。对端口写“1”，通过内部的上拉电阻把端口拉到高电平，此时可作输入口。作为输入口使用时，因为内部存在上拉电阻，某个引脚被外部信号拉低时会输出一个电流（IIL）。P3 口还接收一些用于 Flash 闪速存储器编程和程序校验的控制信号。RST：复位输入。当振荡器工作时，RST 引脚出现两个机器周期以上高电平将使单片机复位。ALE/PROG：当访问外部程序存储器或数据存储器时，ALE（地址锁存允许）输出脉冲用于锁存地址的低 8 位字节。即使不访问外部存储器，ALE 仍以时钟振荡频率的 1/6 输出固定的正脉冲信号，因此它可对外输出时钟或用于定时目的。要注意的是，每当访问外部数据存欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 储器时将跳过一个 ALE 脉冲。对 Flash 存储器编程期间，该引脚还用于输入编程脉冲（PROG）。如有必要，可通过对特殊功能寄存器（SFR）区中的 8EH 单元 D0 位置位，可禁止 ALE 操作。该位置位后，只有一条 MOVX 和 MOVC 指令 ALE 才会被激活。此外，该引脚会被微弱拉高，单片机执行外部程序时，应设置 ALE 无效。PSEN：程序存储允许输出是外部程序存储器的读选通型号，当89C51 由外部存储器取指令（或数据）时，每个机器周期两次 PSEN 有效，即输出两个脉冲。在此期间，当访问外部数据存储器，这两次有效的 PSEN 信号不出现。EA/VPP：外部访问允许。欲使 CPU 仅访问外部程序存储器（地址为 0000HFFFFH），EA 端必须保持低电平（接地）。需注意的是：如果加密位 LB1 被编程，复位时内部会锁存 EA 端状态。如 EA 端为高电平（接 Vcc 端），CPU 则执行内部程序存储器中的指令。Flash 存储器编程时，该引脚加上+12v 的编程允许电源 Vpp，当然这必须是该器件使用 12v 编程电压 Vpp。XTAL1：振荡器反相放大器及内部时钟发生器的输入端。XTAL2：振荡器反相放大器的输出端。89C51 中有一个用于构成内部振荡器的高增益反相放大器，引脚 XTAL1 和 XTAL2 分别是该放大器的输入端和输出 端。这个放大器与作为反馈元件的片外石英晶体或陶瓷谐振器一起构成自激振荡器，振荡电路参见图 5。外接石英晶体或陶瓷谐振器及电容 C1、C2 接在放大器的反馈回路中构成并联振荡电路。对电容 C1、C2 虽没有十分严格的要求，但电容容量的大小会欢迎您阅读并下载本文档，本文档来源于互联网，如有侵权请联系删除！我们将竭诚为您提供优质的文档！word 格式 整理版 学习参考 轻微影响振荡频率的高低、振荡器工作的稳定性、起振的难易程度及温度稳定性