Lesson24Memory电子技术专业英语教程.ppt
Unit10 Computer Program Design Lesson 24 Memory电子技术专业英语教程冯新宇主编电子工业出版社电子工业出版社1/28/20231Lesson 24 MemoryBackgroundsText tourLanguage in useVocabulary Structure Reading/writing techniques1/28/20232TerminologyRAM随机存储器DRAM动态随机存储器DDR（DoubleDataRate）双倍数据数率prefetching预取指令，预取数doubletransitionclocking双倍传输时钟DIMM双直列内存模块；双线内存模块operatingsystem操作系统peakbandwidth峰值带宽Backgrounds1/28/20233Text tour Outline-Introduction-DDR1-DDR2-DDR31/28/20234IntroductionProcessors use system memory to temporarily store the operatingsystem,mission-critical applications,and the data they use andmanipulate.Therefore,the performance of the applications andreliabilityofthedataareintrinsicallytiedtothespeedandbandwidthofthesystemmemory.Over the years,these factors have driven the evolution of systemmemoryfromasynchronousDRAMtechnologies,suchasFastPageMode(FPM)memoryandExtendedDataOutput(EDO)memory,tohigh-bandwidthsynchronousDRAM(SDRAM)technologies.Yet,systemmemorybandwidthhasnotkeptpacewithimprovementsin processor performance,thus creating a“performance gap”.Processor performance,which is often equated to the number oftransistorsinachip,doubleseverycoupleofyears.Ontheotherhand,memorybandwidthdoublesroughlyeverythreeyears.Therefore,ifprocessorandmemoryperformancecontinuetoincreaseattheserates,theperformancegapbetweenthemwillwiden.1/28/20235IntroductionWhyistheprocessor-memoryperformancegapimportant?Theprocessorisforcedtoidlewhileitwaitsfordatafromsystemmemory.Thus,theperformancegappreventsmanyapplicationsfromeffectivelyusingthefullcomputingpowerofmodernprocessors.Inanattempttonarrowtheperformancegap,theindustryvigorouslypursuesthedevelopmentofnewmemorytechnologies.HPworkswithJointElectronicDeviceEngineeringCouncil(JEDEC)memoryvendorsandchipsetdevelopersduringmemorytechnologydevelopment to ensure that new memory products fulfill customerneedsinregardstoreliability,cost,andbackwardcompatibility.1/28/20236DDR1TodevelopthefirstgenerationofDDRSDRAM(DDR-1),designersmadeenhancementstotheSDRAMcoretoincreasethedatarate.Theseenhancementsincludeprefetching,doubletransitionclocking,strobe-baseddatabus,andSSTL1_2lowvoltagesignaling.At400MHz,DDRincreasesmemorybandwidthto3.2GB/s,thisis400percentmorethanoriginalSDRAM.1/28/20237DDR1InSDRAM,onebitperclockcycleistransferredfromthememorycellarraytotheinput/output(I/O)bufferordataqueue(DQ).TheI/Obufferreleasesonebittothebusperpinandclockcycle(ontherisingedgeoftheclocksignal).Todoublethedatarate,DDRSDRAMusesatechniquecalledprefetchingtotransfertwobitsfromthememorycellarraytotheI/Obufferintwoseparatepipelines.ThentheI/Obufferreleasesthebitsintheorderofthequeueonthesameoutputline.Thisisknownas2n-prefetcharchitecturebecausethetwodatabitsarefetchedfromthememorycellarraybeforetheyarereleasedtothebusinatimemultiplexedmanner.1/28/20238DDR1StandardDRAMtransfersonedatabittothebusontherisingedgeofthebusclocksignal,whileDDR-1usesboththerisingandfallingedgesoftheclocktotriggerthedatatransfertothebus.Thistechnique,knownasdoubletransitionclocking,deliverstwicethebandwidthofSDRAMwithoutincreasingtheclockfrequency.DDR-1hastheoreticalpeakdatatransferratesof1.6and2.1GB/satclockfrequenciesof100MHzand133MHz,respectively.1/28/20239AnotherdifferencebetweenSDRAMandDDR-1isthesignalingtechnology.Insteadofusinga3.3Voperatingvoltage,DDR-1usesa2.5VsignalingspecificationknownasStubSeries-TerminatedLogic_2(SSTL_2).Thislow-voltagesignalingresultsinlowerpowerconsumptionandimprovedheatdissipation.AppearanceinFigure24-1.Figure 24-1 DDR1 MEMORY1/28/202310DDR2DDR-2SDRAMisthesecondgenerationofDDRSDRAM.Itoffersdataratesofupto6.4GB/s,lowerpowerconsumption,andimprovementsinpackaging.At400MHzand800Mb/s,DDR-2increasesmemorybandwidthto6.4GB/s,whichis800percentmorethanoriginalSDRAM.DDR-2SDRAMachievesthishigherlevelofperformanceandlowerpowerconsumptionthroughfasterclocks,1.8Voperationandsignaling,andsimplificationofthecommandset.The240-pinconnectoronDDR-2isneededtoaccommodatedifferentialstrobessignals.AppearanceinFigure24-2.1/28/202311Figure24-2DDR2MEMORY1/28/202312DDR3DDR-3,thethird-generationofDDRSDRAMtechnology,willmakefurtherimprovementsinbandwidthandpowerconsumption.ManufacturersofDDR-3willinitiallyuse90nmfabricationtechnologyandmovetoward70nmasproductionvolumesincrease.DDR-3willoperateatclockratesfrom400MHzto800MHzwiththeoreticalpeakbandwidthsrangingfrom6.40GB/sto12.8GB/s.DDR-3isexpectedtoreducepowerconsumptionbyupto30%comparedtoaDDR-2DIMMoperatingatthesamespeed.DDR-3DIMMsareexpectedtousethesame240-pinconnectorasDDR2DIMMs,butthekeynotchwillbeinadifferentposition.1/28/202313Summary of DDR SDRAM technologiesTypeComponentnamingconventionModulenamingconventionBusspeedPeakbandwidthDDR-1DDR200PC1600100MHz1.6GB/sDDR266PC2100133MHz2.1GB/sDDR333PC2700166MHz2.7GB/sDDR400PC3200200MHz3.2GB/sDDR-2DDR2-400PC2-3200R200MHz3.2GB/sDDR2-533PC2-4300266MHz4.3GB/sDDR2-667PC2-5300333MHz5.3GB/sDDR2-800PC2-6400400MHz6.4GB/sDDR-3DDR3-800PC3-6400400MHz6.4GB/sDDR3-1066PC3-8500533MHz8.5GB/sDDR3-1333PC3-10600667MHz10.6GB/sDDR3-1600PC3-12800800MHz12.8GB/s1/28/202314Vocabularyreliability enhancement convention StructureReading/writingtechniquesLanguage in use1/28/202315Vocabulary1/28/202316reliability in dictionaryanalysisofstructurereliability结构可靠度分析IntroductiontoReliabilityTechnology可靠性技术导论mathematicaltheoryofreliability可靠性数学理论reliabilityofcomputersystem计算机系统可靠性reliabilityofelectricalapparatus电器可靠性1/28/202317reliability in textTherefore,theperformanceoftheapplicationsandreliabilityofthedataareintrinsicallytiedtothespeedandbandwidthofthesystemmemory.因此，应用程序的性能和数据的可靠性本质上依赖于系统内存的速度和带宽。1/28/202318enhancement in dictionaryenhancementoffisheryresources水产资源增殖enhancementfactorofmasstransfer传质增强因子EnhancementoftheFinancialInfrastructure改善金融基础设施。enhancement/depletionMOSintegratedcircuit增强型与耗尽型金属-氧化物-半导体集成电路intensifyingbyaugmentationandenhancement.通过增加和改进而强化的。1/28/202319enhancement in textTodevelopthefirstgenerationofDDRSDRAM(DDR-1),designersmadeenhancementstotheSDRAMcoretoincreasethedatarate.为了开发DDRSDRAM的第一代（DDR-1），设计人员对SDRAM核采取了增强措施以增加数据传输率。1/28/202320convention in dictionaryconventiononconsularrelations领事关系公约conventionondiplomaticrelations外交关系公约SpecificConventionalWeaponsConvention禁止或限制使用特定常规武器公约StraitsConventionofLondon伦敦海峡公约InternationalConventionforSafeContainers国际集装箱安全公约1/28/202321convention in textOriginally,themodulenamingconventionforDDR-SDRAMwasbasedontheeffectiveclockrateofthedatatransfer:PC200forDDRSDRAMthatoperatesat100MHz;PC266for133MHz;andsoforth.最初，DDR-SDRAM的命名约定基于有效时钟数据传输速率：PC200的内存工作频率为100MHz；PC266为133MHz等等。1/28/202322convention in usetheNationalConvention法【史】国民议会（1792-1795）英【史】宪章党员大会美（政党决定总统候选人的）全国代表大会conventionmoney(两国以上协定发行的)同本位货币1/28/202323Structure1/28/202324Reading/Writing techniques1/28/202325
