VHDL设计十进制计数器.pdf

.EDAEDA 课程设计清零置数十进制计数器课程设计清零置数十进制计数器程序清单：程序清单：library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;entity cdu10 isport(clk,en,load,reset:in std_logic;d:in std_logic_vector(3 downto 0);cout:out std_logic;q:out std_logic_vector(3 downto 0);end cdu10;architecture exx1 of cdu10 issignal qq:std_logic_vector(3 downto 0);beginp0:process(clk,en,load,reset)beginif(reset=0)then qq=0000;elsif(clkevent and clk=1)thenif load=0 then qq=d;elsif(en=1)thenif qq=1001 then qq=0000;else qq=qq+1;end if;end if;end if;end process p0;q=qq;p1:process(qq)beginif qq=1001 then cout=1;else cout=0;end if;end process p1;end exx1;.仿真波形：仿真波形：.