《双极晶体管》PPT课件.ppt

Bipolar transistor3-1 IntroductionBipolar Transistorl First bipolar transistor(BJT)was invented in 1948l The term bipolar came from the fact that both types of carriers,i.e.,electron and hole play important roles in operation l Field Effect Transistor(FET)is unipolar,in which only one type of carrier is importantBipolar Transistorl In VLSI era,BJTs starts to lose their show stage due to the emergence of MOSFETs,which possess advantage of simplicity in term of process and circuit designl However,BJTs refuse to step down because of their high current drive capability and superior analog performance(also useful in power applications)l Current trend is to combine the best of MOSFETs and Bipolar devices,which is known as BiCMOS processl BJT devices are also the preferred device for high speed(e.g.Emitter Couple Logic.ECL)and RF applicationsBipolar Transistorn+pnp+npBipolar TransistorThe”Planar Process”developed by Fairchild in the late 50s shaped the basic structure of the BJT,even up to the present day.Modern BJTl Close enough that minority carriers interact(negligible recombination in base)BJT basically consists of two neighbouring pn junctions back to back:l For apart enough that depletion regions dont interact(no“punchthrough”)Uniqueness of BJT:high current drivability per input capacitance fast excellent for analog and front-end communications applications.Bipolar operationOperation depends on the bias conditionIBICIE3-2 Carrier distributionCurrent Flowemitter current injected into the base base current injected into the emitter recombination in the base current region reverse biased current across the BCJ reverse biased current across the BCJ electron current from the emitterBipolar TransistorModes of operationVCBSaturationForward activeCutoffInverted activeVEBPNPNPNSaturationForward activeCutoffInverted activeVBCVBEactiveinvertedsaturationcutoffforwardreverseforwardreverseforwardreversereverseforwardE-BC-BModeAn idealized p-n-p transistor in thermal equilibrium,that is,where all there leads are connected together or all are ground.The impurity densities in the three doped regions,where the emitter is more heavily doped than the collector.However the base doping is less than the emitter doping,but greater than the collector doping.Transistor ActionACTIVE MODEIn active mode,the emitter-base junction is forward biased and collector base-junction is reverse biased.Current FlowForward biasReverse biasElectron FlowHole FlowTransistor ActionSaturation ModeBoth junction are in forward biasCutoff ModeBoth junctions are in reverse bias and all currents in the transistor are zero.Inverse-active ModeJunction between E and B is in forward bias and junction between B and C is in reverse bias.Current GainIE=IEp+IEnIC=ICp+ICnIB=IE-IC=IEn+(IEp-ICp)-ICnCurrent GainCommon base current gainEmitter efficiencyBase transport factCollector currentCB:current measured between these two terminalsO:refers to the state of the third terminal with respect to the secondCarrier Profile in Active ModeCarrier distribution in this regionTo derive the current-voltage expression for an ideal transistor,we assume the following:1.The device has uniform doping in each region.2.The hole drift current in the base region as well as the collector saturation current is negligible.3.There is low-level injection.4.There are no generation-combination currents in the depletion region.5.There are no series resistance in the devices.Carrier Distribution in each RegionBase regionSteady-state continuity equationThe general solution is Where is the diffusion length of holes.where and are the diffusion constant and the life time of minority carriers,respectively.By the boundary conditions for the active mode:the solution can expressedWhen W/Lp0Injection of electrons from E to BInjection of holes from B to EVBCICTransistor effect:electrons injected from E to B,extracted by CIn forward-active regime:l VBE controls IC(“transistor effect”)l IC independent of VBC(“isolation”)l Price to pay for control:IBCarrier profiles in TE and FAR:Dominant current paths in forward active regime:IC:electron injection from E to B and collection into C IB:hole injection from B to EIE=-IC-IBKey dependencies(choose one):IC on VBE:,none,otherIC on VBC:,IB on VBE:,IB on VBC:,IC on IB:exponential,quadratic,none,other none,othernone,othernone,otherForward-active regime(VBE0,VBC0,VBCNBl WEWB(for manufacturing reasons,WEWB)l want npn rather than pnp,because this way DBDEl hard to control if is high enough(50),circuit techniques effectively compensate for this.Equivalent circuit modelEnergy band diagramSummery of minority carrier profiles(not to scale)Reverse regime(VBE0)IE:electron injection from C to B,collection into EIB:hole injection from B to C,recombination in CMinority carrier profiles(not to scale):Current equations(just like FAR,but role of collector and emitter reversed):Equivalent-circuit model representation:Prefactor in IE expression is IS:emitter current scales with AE.But,IB scales roughly as AC:l downward component scales as ACl upward component scales as AC-AE ACHence,Energy band diagram:Cut-off regime(VBE0)IE:hole generation in E,extraction into B.IC:hole generation in C,extraction into BMinority carrier profiles(not to scale):Current equations:These are tiny leakage currents(10-12A)Equivalent circuit model representation:Energy band diagramSaturation regime(VBE0,VBC0)IC,IE:balance of electron injection from E/C into BIB:hole injection into E/C,recombination in E/C,respectivelyMinority carrier profiles(not to scale):Current equations:superposition of forward active+reverse:IC and IE can have either sign,depending on relative magnitude of VBE and VBC and Equivalent circuit model representation(Non-linear Hybrid-Model):Complete model has only three parameters:IS,and .Energy band diagram:In saturation,collector and base flooded with excess minority carriers take lots of time to get transistor out of saturation.Key conclusionsl In FAR,current gain maximized if NENB.l hard to control precisely:if big enough(50),circuit techniques can compensate for variations in .l BJT design optimized for operation in forward-active regime operation in inverse is poor:.l In saturation,BJT flooded with minority carrier takes time to get BJT out of saturation.Hybrid-model:equivalent circuit description of BJT in all regimes:Only three parameters needed to describe behavior of BJT in four regimes:IS,and .Key questions l How do the output characteristics of the ideal BJT look like?l How do the charge-voltage characteristics of the ideal BJT look like?l What is the topology of the small-signal equivalent circuit model of the ideal BJT in the FAR?l What are the key dependencies of its elements?Ideal BJT current equations(superposition of forward active+reverse)Equivalent circuit model representation:Complete model has only three parameters:IS,and .Common-emitter output I-V characteristics I-V for Active ModeIE=IEp+IEnIC=ICp+ICnW/Lp1Emitter efficiency(xBLB),(xENBNCDepletion capacitance:Minority carrier chargeKey result from pn diode:in“short”or“transparent”QNR:Stored charge=minority carrier transit time injected minority carrier currentDiffusion capacitance.Excess minority carrier in QNRs excess majority carriers to keep quasi-neutrality For emitter in FAR:with hole transit timeFor base in FAR:with electron transit time:Comments:l Units of QB and QE are C.l QE and QB scale with AE.Total minority carrier in FAR:intrinsic delay s is overall time constant for minority carrier storage in BJT in FAR:Note:emitter contribution to is because IB is times smaller than IC.If VBE changes,QE and QB change capacitive effect:Location of this capacitance?Think of which terminals supply stored change(minority and majority carriers):For QE:l minority carriers(holes)injected from basel majority carriers(electrons)come from emitter contactFor QB:l minority carriers(electrons)injected from emitterl majority carriers(holes)come from base contactEquivalent-circuit model:Similar picture in reverse regime:charge storage in base and collector a bit complicated because it accounts for charge storage in intrinsic and extrinsic base and collector regions.Diffusion capacitance:Located between base and collector terminals.By superposition,complete equivalent circuit model valid in all four regimes:3-5 Small-signal behavior of ideal BJTIn analog(and digital)application,interest in behavior of BJT to small-signal applied on top biasSmall signal equivalent circuit model.Small-signal equivalent circuit model in FARMust linearize hybrid-model in FAR:-Non-linear voltage-controlled current source linear voltage-controlled current source.-Diode linearized to resistor.-Charge storage elements linearized to capacitance.l Linearized voltage-controlled current sourceApply small signal vbe on top of bias VBE.Small signal collector current:Define transconductance:gm depends only on absolute value of IC and T(unlike MOSFET,where gm depends on device geometry)Collector current:Linearized diodeBase current:Small-signal base current:Define conductance:Then,in general,capacitorsQjE CjeQjC CjcQF CTwo components in C :Note:Small-signal equivalent circuit model for ideal BJR in FAR:Key conclusionsEmitter contribution to is times smaller than because IB is times smaller than ICl In BJT,two types of stored charge:depletion layer charge and minority charge.l Depletion layer charge accounted through depletion capacitances.l Minority carrier charge accounted through time constant (intrinsic delay):Non-linear hybrid-model for ideal BJT including charge storage elements:Small-signal equivalent circuit model of ideal BJT in FAR:with:3-6 Frequency CharacteristicsCommon-emitter short-circuit current-gain cut-off frequency,fTfT:high-frequency figure of merit for transistorsShort-circuit means from the small-signal point of view.BJT is biased in FAR.Focus on small-signal current gain:Definition of fT:frequency at which|h21|=1.For low frequency,h21 ,for high frequency h21 rolls off due to capacitors.Small-signal equivalent circuit model:Then:Magnitude of h21:Bode plot of|h21|:Three regimes in|h21|:l intermediate frequency,l low frequency,l high frequency,Angular frequencies that separate three regimes:Angular frequency at which|h21|=1:In terms of frequency:Note:Physical meaning of fTfT has units of time.Define delay time:Four delay components in .Consider response of BJT to a step-input base current:AtAs How much time does it takes for ic to reach its final value?Charge must be delivered to four regions in BJT:l Quasi-neutral emitterl Quasi-neutral basel Emitter-base depletion regionl Base-collector depletion regionCharge delivered at constant rate to base.Time that it takes for all charge to be delivered:How much time does it take for ic to build up to IC+ib?:delay time before ic increase to:delay time before ic increase toSince ,With sinusoidal input:fraction of that goes into capacitanceAt fT:Key dependencies of fT in ideal BJTfT dependence on IC:Rewrite fT:Two limits:l Small IC:limited by depletion capacitancesl Large IC:limited by intrinsic delay(dominated by )Alternative view of IC dependence:Standard experimental technique to extract and :fT dependence on VBC:but only in low IC regime of fT(B-C junction is more reverse biased)Key conclusionsl fT:high frequency figure of merit for transistors:frequency at which|h21|=1.l fT of ideal BJT:l Delay time,:time it takes for step increase in iB to yield an identical step increase in iC.Key questionsl How can the frequency response of a BJT be engineered?l Why are the output characteristics of a BJT in FAR not perfectly flat?l What is the maximum voltage that the collector of a BJT can sustain in FAR?What are the key design issues for the break-down voltage?Key dependencies of fT in ideal BJT(cont.)fT dependence on device layout:l For low IC:fT dominated by Cje,Cjc If AE or AC (keep IC constant)l For high IC:fT dominated by intrinsic delay ;fT independent of AE or ACDevice design strategies for improving fTFour delay terms in fT:Strategies to reduce each delay component:l building steep doping profile in emitter.Emitter charging time,minimized bysmall contribution to ,not much payoff.l having a shallow emitter(),l enhancing ,l introducing drift field in base(through impurity gradient or SiGe composition gradient).l reducing WB (),Base transit time,minimized byExample 1 Kasper 1993Significant device engineering towards minimizing .Example 2 Yamazaki,IEDM 1990,p.309:Example 3 Crabbe,IEDM 1990,p.17:Collector current dependence of fT at 298K and 85K for Si and SiGe devices.In both cases,the peak fT increase at lower temperature as well as the associated collector current.E-B SCR charging time,Cje/gm:Minimized by:l tailoring doping profiles at E-B junctionl NBB-C SCR charging time,Cjc/gm:Minimized by:l NCl tailoring doping profiles at B-C junction.l tightening layout of transistor:3-7 Non-ideal effects in BJTl Early effect:impact of VBC on WBl Reverse early effect:impact of VBE on WBIB unchangedsmaller IC than ideal ,IB unchangedEarly effect:impact of VBC on WBNote:VBC more negativeTo capture first-order impact,linearize WB(VBC):VA is Early voltage:Impact on IC:since typicallyNotice:.ThenAlso,since IB unchanged:Manifestation of Early effect in output characteristics:Main consequence of Early effect:finite slope in output characteristics in FAR:out put conductance.With go given by:Base-width modulationVBE and VBC affect xBC,respectivelyKirk effect基区纵向扩展时的势垒区基区有横向扩展时少子的运动情况High Injection Effect(Webster Effect)High Injection EffectAs VBE increases,the injected minority carrier concentration may approach,or even become large than,the majority carrier concentration.High Injection EffectReduction in emitter injection efficiency,since JPE increasesCollector current will become an exponential function of VBE in terms of qVBE/2kTHigh Collector Current EffectHigh collector current effectsThen,as IC approaches:As IC,electron velocity in collector.But,there is a limit:The electrostatics of the collector are profoundly modifiedtransistor performance degrades:To first order:Key design issue:NCMain origin:formation of current-induced base inside collector SCR effective quasi-neutral base widthnew delay componentCurrent Crowding EffectCurrent CrowdingCurrent CrowdingBreakdown EffectAvalanche breakdownSudden rise in IC for large reverse VCB.Key issue:breakdown voltage depends on terminal configuration:Experimental observation:BVCB0 BVCB0l Common-base configuration:breakdown as in isolated p-n junctionBreakdown when Ml Common-emitter configuration:BE and BC junctions interact in a positive feedback loopBreakdown occurs at finite M and enhanced by high .With IB=0(or fixed),holes generated in B-C junction must be injected into E B-E goes into forward bias .Key dependencise:more than necessary!but BVCBO unchanged dont wantYamaguchi 1993Collector-to-emitter breakdown voltage dependent on current gainBreakdown VoltageIn the extreme,the entire neutr