DS18b20英文资料.pdf

1 of 26020100FEATURES?Unique 1-WireTM interface requires only oneport pin for communication?Multidrop capability simplifies distributedtemperature sensing applications?Requires no external components?Can be powered from data line.Power supplyrange is 3.0V to 5.5V?Zero standby power required?Measures temperatures from-55C to+125C.Fahrenheit equivalent is-67F to+257F?0.5C accuracy from-10C to+85C?Thermometer resolution is programmablefrom 9 to 12 bits?Converts 12-bit temperature to digital word in750 ms(max.)?User-definable,nonvolatile temperature alarmsettings?Alarm search command identifies andaddresses devices whose temperature isoutside of programmed limits(temperaturealarm condition)?Applications include thermostatic controls,industrial systems,consumer products,thermometers,or any thermally sensitivesystemPIN ASSIGNMENTPIN DESCRIPTIONGND-GroundDQ-Data In/OutVDD-Power Supply VoltageNC-No ConnectDESCRIPTIONThe DS18B20 Digital Thermometer provides 9 to 12-bit(configurable)temperature readings whichindicate the temperature of the device.Information is sent to/from the DS18B20 over a 1-Wire interface,so that only one wire(and ground)needs to be connected from a central microprocessor to a DS18B20.Power for reading,writing,andperforming temperature conversions can be derived from the data line itself with no need for an externalpower source.Because each DS18B20 contains a unique silicon serial number,multiple DS18B20s can exist on thesame 1-Wire bus.This allows for placing temperature sensors in many different places.Applicationswhere this feature is useful include HVAC environmental controls,sensing temperatures inside buildings,equipment or machinery,and process monitoring and control.DS18B20Programmable Resolution1-Wire Digital TPRELIMINARYDALLASDS18201 2 3GNDDQVD1 2 3BOTTOM VIEWDS18B20 TO-92PACKAGE12348765NCNCNCGNNCNCVDDDQDS18B20Z8-PIN SOIC(150-MIL)DS18B20PTSOCNCDQVDD123465GNDNCNCDS18B202 of 26DETAILED PIN DESCRIPTION Table 1PINTSOCPIN8PIN SOICPINTO92SYMBOLDESCRIPTION151GNDGround.242DQData Input/Output pin.For 1-Wire operation:Opendrain.(See“Parasite Power”section.)333VDDOptional VDD pin.See“Parasite Power”section fordetails of connection.VDD must be grounded foroperation in parasite power mode.DS18B20Z(8-pin SOIC)and DS18P20P(TSOC):All pins not specified in this table are not to beconnected.OVERVIEWThe block diagram of Figure 1 shows the major components of the DS18B20.The DS18B20 has fourmain data components:1)64-bit lasered ROM,2)temperature sensor,3)nonvolatile temperature alarmtriggers TH and TL,and 4)a configuration register.The device derives its power from the 1-Wirecommunication line by storing energy on an internal capacitor during periods of time when the signal lineis high and continues to operate off this power source during the low times of the 1-Wire line until itreturns high to replenish the parasite(capacitor)supply.As an alternative,the DS18B20 may also bepowered from an external 3V-5.5V supply.Communication to the DS18B20 is via a 1-Wire port.With the 1-Wire port,the memory and controlfunctions will not be available before the ROM function protocol has been established.The master mustfirst provide one of five ROM function commands:1)Read ROM,2)Match ROM,3)Search ROM,4)Skip ROM,or 5)Alarm Search.These commands operate on the 64-bit lasered ROM portion of eachdevice and can single out a specific device if many are present on the 1-Wire line as well as indicate tothe bus master how many and what types of devices are present.After a ROM function sequence has beensuccessfully executed,the memory and control functions are accessible and the master may then provideany one of the six memory and control function commands.One control function command instructs the DS18B20 to perform a temperature measurement.The resultof this measurement will be placed in the DS18B20s scratch-pad memory,and may be read by issuing amemory function command which reads the contents of the scratchpad memory.The temperature alarmtriggers TH and TL consist of 1 byte EEPROM each.If the alarm search command is not applied to theDS18B20,these registers may be used as general purpose user memory.The scratchpad also contains aconfiguration byte to set the desired resolution of the temperature to digital conversion.Writing TH,TL,and the configuration byte is done using a memory function command.Read access to these registers isthrough the scratchpad.All data is read and written least significant bit first.DS18B203 of 26DS18B20 BLOCK DIAGRAM Figure 1PARASITE POWERThe block diagram(Figure 1)shows the parasite-powered circuitry.This circuitry“steals”powerwhenever the DQ or VDD pins are high.DQ will provide sufficient power as long as the specified timingand voltage requirements are met(see the section titled“1-Wire Bus System”).The advantages ofparasite power are twofold:1)by parasiting off this pin,no local power source is needed for remotesensing of temperature,and 2)the ROM may be read in absence of normal power.In order for the DS18B20 to be able to perform accurate temperature conversions,sufficient power mustbe provided over the DQ line when a temperature conversion is taking place.Since the operating currentof the DS18B20 is up to 1.5 mA,the DQ line will not have sufficient drive due to the 5k pullup resistor.This problem is particularly acute if several DS18B20s are on the same DQ and attempting to convertsimultaneously.There are two ways to assure that the DS18B20 has sufficient supply current during its active conversioncycle.The first is to provide a strong pullup on the DQ line whenever temperature conversions or copiesto the E2 memory are taking place.This may be accomplished by using a MOSFET to pull the DQ linedirectly to the power supply as shown in Figure 2.The DQ line must be switched over to the strong pull-up within 10 s maximum after issuing any protocol that involves copying to the E2 memory or initiatestemperature conversions.When using the parasite power mode,the VDD pin must be tied to ground.Another method of supplying current to the DS18B20 is through the use of an external power supply tiedto the VDD pin,as shown in Figure 3.The advantage to this is that the strong pullup is not required on theDQ line,and the bus master need not be tied up holding that line high during temperature conversions.This allows other data traffic on the 1-Wire bus during the conversion time.In addition,any number ofDS18B20s may be placed on the 1-Wire bus,and if they all use external power,they may allsimultaneously perform temperature conversions by issuing the Skip ROM command and then issuing theConvert T command.Note that as long as the external power supply is active,the GND pin may not befloating.The use of parasite power is not recommended above 100C,since it may not be able to sustaincommunications given the higher leakage currents the DS18B20 exhibits at these temperatures.For64-BIT ROMAND1-WIRE PORTMEMORY ANDCONTROL LOGICSCRATCHPAD8-BIT CRCGENERATORTEMPERATURE SENSORHIGH TEMPERATURETRIGGER,THLOW TEMPERATURETRIGGER,TLCONFIGURATIONREGISTERPOWERSUPPLYSENSEINTERNAL VDDDQVDDDS18B204 of 26applications in which such temperatures are likely,it is strongly recommended that VDD be applied to theDS18B20.For situations where the bus master does not know whether the DS18B20s on the bus are parasitepowered or supplied with external VDD,a provision is made in the DS18B20 to signal the power supplyscheme used.The bus master can determine if any DS18B20s are on the bus which require the strongpullup by sending a Skip ROM protocol,then issuing the read power supply command.After thiscommand is issued,the master then issues read time slots.The DS18B20 will send back“0”on the 1-Wire bus if it is parasite powered;it will send back a“1”if it is powered from the VDD pin.If the masterreceives a“0,”it knows that it must supply the strong pullup on the DQ line during temperatureconversions.See“Memory Command Functions”section for more detail on this command protocol.STRONG PULLUP FOR SUPPLYING DS18B20 DURING TEMPERATURECONVERSION Figure 2USING VDD TO SUPPLY TEMPERATURE CONVERSION CURRENT Figure 3P+3V-+5.5V+3V-+5.5VDS18B20GNDVDDI/O4.7KPDS18B20VDDI/O+3V-+5.5V4.7KEXTERNAL+3V-+5.5VSUPPLYTO OTHER1-WIREDEVICESDS18B205 of 26OPERATION-MEASURING TEMPERATUREThe core functionality of the DS18B20 is its direct-to-digital temperature sensor.The resolution of theDS18B20 is configurable(9,10,11,or 12 bits),with 12-bit readings the factory default state.Thisequates to a temperature resolution of 0.5C,0.25C,0.125C,or 0.0625C.Following the issuance ofthe Convert T 44h command,a temperature conversion is performed and the thermal data is stored inthe scratchpad memory in a 16-bit,sign-extended twos complement format.The temperatureinformation can be retrieved over the 1-Wire interface by issuing a Read Scratchpad BEh commandonce the conversion has been performed.The data is transferred over the 1-Wire bus,LSB first.TheMSB of the temperature register contains the“sign”(S)bit,denoting whether the temperature is positiveor negative.Table 2 describes the exact relationship of output data to measured temperature.The table assumes 12-bitresolution.If the DS18B20 is configured for a lower resolution,insignificant bits will contain zeros.ForFahrenheit usage,a lookup table or conversion routine must be used.Temperature/Data Relationships Table 2232221202-12-22-32-4LSBMSb(unit=C)LSbSSSSS262524MSBTEMPERATUREDIGITAL OUTPUT(Binary)DIGITALOUTPUT(Hex)+125C0000 0111 1101 000007D0h+85C0000 0101 0101 00000550h*+25.0625C0000 0001 1001 00010191h+10.125C0000 0000 1010 001000A2h+0.5C0000 0000 0000 10000008h0C0000 0000 0000 00000000h-0.5C1111 1111 1111 1000FFF8h-10.125C1111 1111 0101 1110FF5Eh-25.0625C1111 1110 0110 1111FF6Fh-55C1111 1100 1001 0000FC90h*The power on reset register value is+85C.OPERATION-ALARM SIGNALINGAfter the DS18B20 has performed a temperature conversion,the temperature value is compared to thetrigger values stored in TH and TL.Since these registers are 8-bit only,bits 9-12 are ignored forcomparison.The most significant bit of TH or TL directly corresponds to the sign bit of the 16-bittemperature register.If the result of a temperature measurement is higher than TH or lower than TL,analarm flag inside the device is set.This flag is updated with every temperature measurement.As long asthe alarm flag is set,the DS18B20 will respond to the alarm search command.This allows manyDS18B20s to be connected in parallel doing simultaneous temperature measurements.If somewhere thetemperature exceeds the limits,the alarming device(s)can be identified and read immediately withouthaving to read non-alarming devices.DS18B206 of 2664-BIT LASERED ROMEach DS18B20 contains a unique ROM code that is 64-bits long.The first 8 bits are a 1-Wire family code(DS18B20 code is 28h).The next 48 bits are a unique serial number.The last 8 bits are a CRC of the first56 bits.(See Figure 4.)The 64-bit ROM and ROM Function Control section allow the DS18B20 tooperate as a 1-Wire device and follow the 1-Wire protocol detailed in the section“1-Wire Bus System.”The functions required to control sections of the DS18B20 are not accessible until the ROM functionprotocol has been satisfied.This protocol is described in the ROM function protocol flowchart(Figure 5).The 1-Wire bus master must first provide one of five ROM function commands:1)Read ROM,2)MatchROM,3)Search ROM,4)Skip ROM,or 5)Alarm Search.After a ROM function sequence has beensuccessfully executed,the functions specific to the DS18B20 are accessible and the bus master may thenprovide one of the six memory and control function commands.CRC GENERATIONThe DS18B20 has an 8-bit CRC stored in the most significant byte of the 64-bit ROM.The bus mastercan compute a CRC value from the first 56-bits of the 64-bit ROM and compare it to the value storedwithin the DS18B20 to determine if the ROM data has been received error-free by the bus master.Theequivalent polynomial function of this CRC is:CRC=X8+X5+X4+1The DS18B20 also generates an 8-bit CRC value using the same polynomial function shown above andprovides this value to the bus master to validate the transfer of data bytes.In each case where a CRC isused for data transfer validation,the bus master must calculate a CRC value using the polynomialfunction given above and compare the calculated value to either the 8-bit CRC value stored in the 64-bitROM portion of the DS18B20(for ROM reads)or the 8-bit CRC value computed within the DS18B20(which is read as a ninth byte when the scratchpad is read).The comparison of CRC values and decisionto continue with an operation are determined entirely by the bus master.There is no circuitry inside theDS18B20 that prevents a command sequence from proceeding if the CRC stored in or calculated by theDS18B20 does not match the value generated by the bus master.The 1-Wire CRC can be generated using a polynomial generator consisting of a shift register and XORgates as shown in Figure 6.Additional information about the Dallas 1-Wire Cyclic Redundancy Check isavailable in Application Note 27 entitled“Understanding and Using Cyclic Redundancy Checks withDallas Semiconductor Touch Memory Products.”The shift register bits are initialized to 0.Then starting with the least significant bit of the family code,1bit at a time is shifted in.After the eighth bit of the family code has been entered,then the serial numberis entered.After the 48th bit of the serial number has been entered,the shift register contains the CRCvalue.Shifting in the 8 bits of CRC should return the shift register to all 0s.64-BIT LASERED ROM Figure 48-BIT CRC CODE48-BIT SERIAL NUMBER8-BIT FAMILY CODE(28h)MSBLSBMSBLSBMSBLSBDS18B207 of 26ROM FUNCTIONS FLOW CHART Figure 5DS18B208 of 261-WIRE CRC CODE Figure 6MEMORYThe DS18B20s memory is organized as shown in Figure 8.The memory consists of a scratchpad RAMand a nonvolatile,electrically erasable(E2)RAM,which stores the high and low temperature triggers THand TL,and the configuration register.The scratchpad helps insure data integrity when communicatingover the 1-Wire bus.Data is first written to the scratchpad using the Write Scratchpad 4Eh command.It can then be verified by using the Read Scratchpad BEh command.After the data has been verified,aCopy Scratchpad 48h command will transfer the data to the nonvolatile(E2)RAM.This process insuresdata integrity when modifying memory.The scratchpad is organized as eight bytes of memory.The first two bytes contain the LSB and the MSBof the measured temperature information,respectively.The third and fourth bytes are volatile copies ofTH and TL and are refreshed with every power-on reset.The fifth byte is a volatile copy of theconfiguration register and is refreshed with every power-on reset.The configuration register will beexplained in more detail later in this section of the datasheet.The sixth,seventh,and eighth bytes areused for internal computations,and thus will not read out any predictable pattern.It is imperative that