【精品】SoC设计方法与实现第二章 设计流程精品ppt课件.ppt
-
资源ID:86273758
资源大小:926KB
全文页数:14页
- 资源格式: PPT
下载积分:15金币
快捷下载
会员登录下载
微信登录下载
三方登录下载:
微信扫一扫登录
友情提示
2、PDF文件下载后,可能会被浏览器默认打开,此种情况可以点击浏览器菜单,保存网页到桌面,就可以正常下载了。
3、本站不支持迅雷下载,请使用电脑自带的IE浏览器,或者360浏览器、谷歌浏览器下载即可。
4、本站资源下载后的文档和图纸-无水印,预览文档经过压缩,下载后原文更清晰。
5、试题试卷类文档,如果标题没有明确说明有答案则都视为没有答案,请知晓。
|
【精品】SoC设计方法与实现第二章 设计流程精品ppt课件.ppt
SoC设计方法与实现第二章 设计流程OutlinesHardware/software(HW/SW)co-design flowStandard cell based design flowDuality of Software and HardwareThe hardware and software in an embedded system work together to solve a problem How to partition is usually dictated by speed and costnDedicated hardware is fast,inflexible and expensivenReconfigurable hardware is fast,flexible and more expensivenSoftware is slower,more flexible and cheaperHW/SW Pro and ConHardware solution:PROnCan be factors of 10X,100X or greater speed increasenRequires less processor complexity,so overall system is simplernLess software design time requirednUnless hardware bug is fatal,workarounds might be doable in softwareHardware solution:CONnLarge NRE charges nPotentially long development cycle nLittle or no margin for errornOnly 50%of ASIC ICs work the first timenIP Royalty charges nHardware design tools can be very costly HW/SW Pro and ConSoftware solution:PROnNo additional impact on materials costs,power requirements,circuit complexitynBugs are easily dealt with,even in the field!nSoftware design tools are relatively inexpensivenNot sensitive to sales volumesSoftware solutions:CONnRelative performance versus hardware is generally far inferiornAdditional algorithmic requirements forces more processing powernBigger,faster,processorsnMore memorynBigger power supplynRTOS may be necessary(royalties)nMore uncertainty in software development scheduleSoC Design FlowHardware/software co-design flowDetailed hardware design flowStandard Cell Based ASIC Design Flow Traditional ASIC Design Flow cont.Detailed Design FlowDetailed Design Flow cont.Detailed Design Flow cont.SoC设计方法与实现设计方法与实现郭炜郭炜 郭筝郭筝 谢憬谢憬Thank you