计算机系统组成与体系结构_答案.pdf

SOLUTIONS MANUALComputer Systems Organizationand ArchitectureJohn D.CarpinelliCopyright 2001,Addison Wesley Longman-All Rights ReservedComputer Systems Organization and Architecture-Solutions ManualTable of ContentsChapter 11Chapter 28Chapter 318Chapter 421Chapter 533Chapter 645Chapter 759Chapter 880Chapter 992Chapter 10100Chapter 11106Chapter 12.116Copyright 2001 Addison Wesley-All Rights ReservedPage iiComputer Systems Organization and Architecture-Solutions ManualChapter 12.a)wXyzwxxzVwx+xz+yb)wXyzw+x+y+z0000001100000000100110001100100000001010011000000111010000110100101010111010110110000001101011101010111110000011100011001001110011101000001010110110000101111100101111001110111111101111101001111011111110111111c)wXyzw xyz wxyzw yyz w 3 3z+w xyz+卬 *$z+w yyz000000000000100000001000101001110001010000000010100000011000011011101001100000000100100000101000000101100000110000000110100000111000000111100000Copyright 2001 Addison Wesley-All Rights ReservedPage 1Computer Systems Organization and Architecture-Solutions Manual工abab(abyab a +6.0001111010110110010111110000aba+b(a+ab ab0001111011010010100101110000a)b)c)4wxyz 00011110001|001011id1VlJ.000oo)000加,D00010k.i)011 00J1R10m0(E1a)5卬二夕+卬 +wxy+wx 2 or卬夕 2+xyz+wyz，V+w 旷+xz+xyorx2+w 旷+xz+y26.a)vv zz+xywxyz 00011110()000n011 JX1,i11 0,1X010 0XX0b)wxyz 0001111000显1i,x j010XX011 00X010修XXX17.a)wxyW 00 01-0 011 1001111000001n0(L u71)0000wx+xz+w y zy z+孙，+wzwxyz,00 010001111011 100101101001011010Already tninitnal8.9.wx+xyCopyright 2001 Addison Wesley-All Rights ReservedPage 2Computer Systems Organization and Architecture-Solutions Manual10.a)11.Change the AND gates to NAND gates.The rest of the circuit is unchanged.12.Remove the tri-state buffers and do one of the following:a)Change each 2-input AND gate to a 3-input AND gate.Each gates1 inputs should be its two originalinputs and E,orb)Have each AND gates output serve as an input to another 2-input AND gate,one gate fbr each originalAND gate.The second input to the new 2-input AND gates is E.13.14.Copyright 2001 Addison Wesley-All Rights ReservedPage 3Computer Systems Organization and Architecture-Solutions Manual15.Set up Karnaugh maps fbr each output,then develop minimal logic expressions and design the appropriatelogic circuits.(X Y)=XJYI,+X。匕 +XM1(X=Y)=X,Yi,Yo+X/，X()YIrYo+Yo 1+X/X ohYo=(XI 匕)。%)(X +XllX o,e=X2Xl,+X0X3X X,X0 00 01 11 1000 0 I 0 I 0|Uo i-6 6 6 o-“XXX 国io|o I o I x|X3XK,X 00 01 11 10C =X2%X。，f=XlX0+X3fX2X0+X2fXICopyright 2001 Addison Wesley-All Rights ReservedPage 5Computer Systems Organization and Architecture-Solutions Manual20.The four inputs can be in one of 24(=4!)possible orders.Since each sorter has two possible states(MAX=X MIN=X,or MAX =Y MIN=X),sorters can have up to T states.Four sorters can have only 24=16states,not enough to sort all 24 possible input orders.Five sorters have 25=32 states,which could besufficient.(This argument establishes a lower bound;it does not guarantee the existence of a 5-sorternetwork that can sort four inputs.Since the sorting network of Figure 1.24(b)matches this bound,it is aminimal network.)21.a)22.A flip-flop is clocked if the increment signal and clock are asserted,and all flip-flops to its right are 1.23.Each clock is driven by Q of the flip-flop to its right instead of Q.The clock of the rightmost flip-flop isunchanged.All other signals are unchanged.XzXX/X。00 01 11 10Copyright 2001 Addison Wesley-All Rights ReservedPage 6Computer Systems Organization and Architecture-Solutions ManualCopyright 2001 Addison Wesley-All Rights ReservedPage 7Computer Systems Organization and Architecture-Solutions ManualChapter 22.Present State SgKTTTR Next Stateuu _UTT2TT2T3g2TuoTV五yTggigKTU 1 1 u3.Add the following states to the state table.Since all additions are self-loops,it is not necessary to changethe state diagram.Present StatechIoNext StateRGASNOCAR001s NOCAR100SNOCAR010SNOCAR100s NOCAR011sNOCAR100SPMD101SP.M D010SPA II110SPAII,010SPA ID111SPA ID010s CHEAT001s CH EAT101S CHEAT010S CH EAT101S CHEAT011S CH EAT101Copyright 2001 Addison Wesley-All Rights ReservedPage 8Computer Systems Organization and Architecture-Solutions ManualCopyright 2001 Addison Wesley-All Rights ReservedPage 9Computer Systems Organization and Architecture-Solutions Manual5.6.Address Data(Mealy)Data(Moore)000000000000000100100010001001000100001101100110010010001000010110101010011011011100011111101110100000000000100100100010101001000100101101100110110010001001110110101011111011011100n il111011107.Present StateINext StateM000000001010010000011100100110101100110001111011N=P/Pol+PF。NO=P/PO7+PFOT+P R JM=P RCopyright 2001 Addison Wesley-All Rights ReservedPage 10Computer Systems Organization and Architecture-Solutions Manual8.9.Address Data(Mealy)Data(Moore)000000000001010010010000000Oil100100100111110101100100110000001111010Oil10.State value assignments(P3 P.S()=0000 S5=0001 S/o=0010 S15=0011 S20=010025=0101 S30=00 SPAID=0 SN0CAR=1000 SCHEAT=1001M=c，M=P/Chlo+尸 3(匕 +尸/)C/o+P/(P2 +PFo)C“Io+P2CII,IO,N尸 P3P2+匕+Po)ChIo+匕(尸2+P/K W +PNPiP。+P/PJ+P2PlPo)CIl,Io+P.PoChIoN=PAP2+匕 +PQ C。+PNPo+P2Pi)CIlI0,+P式 Po+P2PDCW0+P3 尸。C/4/+P3Poe+2 3(尸2+匕 +尸0)。R=SPAIDG=SPAID4 =ScHEAT1 1.State value assignments(Pj-Po)：S()=0000 S5=0001 Sl0=0010=0011 520=010025=0101 S30=0110 SPAID=0111 SNOCAR=1000 SCHEAT=1001N3=CM =P H+P/(P2+尸3(尸2 +P/P o)C/0 +P2Ch，Io,N】=P3P2+匕 +P0)ChI0+PNP2+尸+PAP1P0+PFo+P2PiPo)CIl,Io+PiPoChVN0=匕(P2+匕 +PQCWo+PNPo+P2PI)C1II(),+尸3 W+P2PI)CII 7。+尸3尸。0+P3Poe+尸3(尸2+匕+尸。)。R=GG=P3P2+PChlo+P；P2Poeh+P；P2PAh+Io)+P3T2PF0CA =匕(尸2+匕+尸。)仁Copyright 2001 Addison Wesley-All Rights ReservedPage 11Computer Systems Organization and Architecture-Solutions Manual12.AddressDataOOOOX X X 1001101 1001101 1001101 1001101 0000100 0001100 0010100 01011000001X X X1001101 1001101 1001101 1001101 0001100 0010100 0011100 01101000010X X X1001101 1001101 1001101 1001101 0010100 0011100 0100100 01110100011X X X1001101 1001101 1001101 1001101 0011100 0100100 0101100 01110100100X X X1001101 1001101 1001101 1001101 0100100 0101100 0110100 01110100101X X X1001101 1001101 1001101 1001101 0101100 0110100011101001110100110X X X1001101 1001101 1001101 1001101 01101000111010011101001110100111X X X1000100 1000100 1000100 1000100 0111010 0111010 0111010 01110101000X X X1000100 1000100 100010()1000100 0000100 000()10()0000100 00001001001X X X1001101 1001101 1001101 1001101 000010()000010()0000100 00001001010X X X 1000100 1000100 1000100 1000100 1000100 1000100 1000100 100010010HX X X1000100 1000100 1000100 1000100 1000100 1000100 100010()1000100uooxxx1000100 1000100 1000100 1000100 1000100 1000100 1000100 10001001101X X X1000100 1000100 1000100 1000100 1000100 1000100 1000100 10001001110X X X 1000100 1000100 1000100 1000100 1000100 1000100 1000100 10001001111X X X1000100 1000100 1000100 1000100 1000100 1000100 1000100 1000100N2=P2Po，+P2U,+PlPoUN1=PIPO，+PIU,+P2,P1,POUNo=PoU+PoUC=P2,PI,POV,+P2PI,POUv2=P2P1P0U+尸2匕了。+PzPfPMVy=PPiPoU+PzHPo+PzPjPoU%=(尸2+PMoU+(P2+Pj)PoU15.All possible next state values are already used.Copyright 2001 Addison Wesley-All Rights ReservedPage 12Computer Systems Organization and Architecture-Solutions Manual16.State value assignments(P3-Po)：So=0000 55=0001 5川=0010 5/5=0011$20=0100S25=0101$30=0110 SpiD=0111 SOCAR=1000 SCHEAT=1001 54=1010ion sc=iioo sD=noi sE=mo sF=miAdd to state diagram:Add to state table:Present StateChIoNext StateRGA1010XXX10000001011XXX10000001100XXX10000001101XXX10000001110XXX10000001111XXX1000000N3=C,P3(P2+PI)M =P H+匕(尸2+匕)C/J +PAP2 +匕 P o)C/o +P2Ch，IoNi=P/(P2+P/+Po)CIlIo+尸 3(P 2+P j)W +PPiPo+P】Po+P2PjPo)CI“o+PiPoChIo1No=PNP?+匕+W h lo +P3P0+P2PoeW +P 3 W+P2PDCW0+P；PoCh7o，+P3Poe+尸3(尸2 +匕+尸。)。R=SPAIDG=SpAIDA =S C H E A T17.N 3 =P 2 P/P 0 U +尸3(尸2,+P/+P o+N2=P3P2(Po+/2匕+PfPFoUN=P/(尸2+尸/)+P z P/P o U +PjUNO=(P3+P2)PIV +P3P2U+P0U1C=P2Pl,Pof匕=尸3尸/尸。+尸3尸2尸0匕=-3巧尸。+尸2尸/尸。V0=P3lP2rP0+P2PP0P3PlfP0Copyright 2001 Addison Wesley-All Rights ReservedPage 13Computer Systems Organization and Architecture-Solutions Manual18.raCopyright 2001 Addison Wesley-All Rights ReservedPage 14Computer Systems Organization and Architecture-Solutions Manual20.States are of the form ABCYZ,where ABC=0 if a player may signal,or 1 if the player may not signal.YZrepresents the player answering the question(01=player 1,10=player 2,11=player 3,00=no player).Although not shown in the diagram,there is an arc from every state back to state 00000 with condition R.AddressDataX X X X X XXIX 00000 00000000 ooox00000 00000000()1 ox00001 00000000 100X00010 00000000 110X00011 00000001 xxoo00001 10000001 X X 0110000 10000010 xxoo00010 01000010 X X 0101000 01000011 xxoo00011 00100011 X X 0100100 00100100 ooox00100 00000100 010X00101 00000100 100X00110 00000100 110X00100 00000101 xxoo00101 10000101 X X 0110100 100AddressData00110 xxoo0011001000110X X 010110001001000 xoox01000 00001000 010X01001 00001000 110X01011 00001001 xxoo()1001 10001001 X X 0111000 10001011 xxoo01011 00101011 X X 0101100 00101100 ooox()1100 00()01100 010X01101 00001100 1X 0X01100 00001101 xxoo01101 10001101 X X 0111100 10010000 oxox10000 00010000 100X10010 00010000 110X10011 000AddressData10010 xxoo1001001010010 X X 0111000 01010011 xxoo10011 00110011 X X 0110100 00110100 oxox10100 00010100 100X10110 00010100 110X10100 00010110 xxoo1011001010110X X 011110001011000 oxox11000 00011000 100X11000 00011000 110X11011 00011011 xxoo11011 00111011 X X 0111100 00111100 xxox11100 000AH others()000()000Copyright 2001 Addison Wesley-All Rights ReservedPage 15Computer Systems Organization and Architecture-Solutions Manual21.States are of the form ABCYZ,where ABC=0 if a player may signal,or 1 if the player may not signal.YZrepresents the player answering the question(01=player 1,10=player 2,11=player 3,00=no player).Although not shown in the diagram,there is an arc from every state back to state 00000 with condition R.AddressDataAddressDataX X X X X X X IX 00000 00000110 xxoo0011001000000 ooox00000 00000110X X 0101100 00000000 01 ox00001 1000100()xoox01000 00000000 100X00010 01001000 010X01001 10000000 110X00011 00101000 110X01011 00100001 xxoo00001 10001001 xxoo01001 10000001 X X 0110000 00001001 X X 0111000 00000010 xxoo00010 01001011 xxoo01011 00100010 X X 0101000 00001011 X X 0101100 00000011 xxoo00011 00101100 ooox01100 00000011 X X 0100100 00001100 010X01101 1000010()ooox00100 000()1100 1X 0X01100 00000100 010X00101 10001101 xxoo01101 10000100 100X0011001001101 X X 0111100 00000100 110X00100 00()10000 oxox10000 00000101 xxoo00101 10010000 100X1001001000101 X X 0110100 00010000 110X10011 001AddressData10010 xxoo10010 01010010 X X 0111000 00010011 xxoo10011 00110011 X X 0110100 00010100 oxox10100 00010100 100X1011001010100 110X10100 00010110 xxoo1011001010110X X 0111100 00011000 oxox11000 00011000 100X11000 00011000 110X11011 001n o n xxoo11011 001n o n xxoi11100 00011100 xxox11100 000All others00000 000Copyright 2001 Addison Wesley-All Rights ReservedPage 16Computer Systems Organization and Architecture-Solutions Manual22.23.24.25.Po：PoX Y should be P()X TB:Po should be P。26.CLR:Counter input D():A:OX K should be X YOX Y should be OX Y1 should be 027.Address Correct Data0011011100100010H101100111Copyright 2001 Addison Wesley-All Rights ReservedPage 17Computer Systems Organization and Architecture-Solutions ManualChapter 31.a)Data movementb)Data operationC)Program controld)Data operatione)Data operation2.a)Data operationb)Program controlC)Data movementd)Data movemente)Data operation3.a)Directb)Impliedc)Implicit4.a)Implicitb)Directc)Implicit5.a)Implicitb)DirectC)Implicit6.a)Register Directb)ImmediateC)Implicitd)Immediatee)Direct7.a)Implicitb)DirectC)Indirectd)Register Indirecte)Register Direct8.a)Register Directb)Register IndirectC)Implicitd)Implicite)ImmediateMULADDPOPX9.a)AC=11 b)AC=12 c)AC=10 d)AC=11 e)AC=10f)AC=33 g)AC=4110.a)AC=11 b)AC=12 C)AC=30 d)AC=31e)AC=10f)AC=23 g)4C=3111.a)AC=Il b)AC=12 C)AC=20 d)AC=2e)AC=10f)AC=43 g)AC=2112.a)MULX,B,Cb)MOV X,B C)LOADBd)PUSH AADD X,X,AMUL X,CMULCPUSHBADD X,X,DADD X,AADDAPUSH CADD X,DADDDSTORE XMULPUSH DADDADDPOPX13.a)MUL TABb)MOV T,A c)LOAD Ad)PUSH AMUL T,T,CMUL T,BMULBPUSHBADD X,E,FMUL T,CMULCMULMUL X,X,DMOV X,ESTORETPUSHCADD X,X,TADD X,FLOADEMULMUL X,DADDFPUSHDADD X,TMULTDADDTSTORE XPUSHEPUSHFADDCopyright 2001 Addison Wesley-All Rights ReservedPage 18Computer Systems Organization and Architecture-Solutions ManualPOPX14.a)MUL X,B,CSUB X,A,Xb)MOV T,BMUL T,CC)LOADBMULCd)PUSH APUSH BMUL T,E,FMOV X,ASTORETPUSHCADD T,T,DSUB X,TLOAD AMULMUL X,X,TMOV T,ESUBTSUBMUL T,FSTORE XPUSH DADD T,DLOADEPUSHEMUL X,TMULFPUSHFADDDMULMULXADDSTORE XMUL15.Processor Time per instruction#Instructions Total time035 ns4140 ns150 ns3150 ns270 ns2140 ns3100 ns1100 ns fastest16.Processor Time per instruction#Instructions Total time035 ns8280 ns150 ns5250 ns 0,20 fbr example.13.14.This is the same as the previous problem,except/o/M is not included.15.16.This is the same as the previous problem,except IO/M is not included.Copyright 2001 Addison Wesley-All Rights ReservedPage 26Computer Systems Organization and Architecture-Solutions Manual17.18.This is the same as the previous problem,except/o/M is not included.Copyright 2001 Addison Wesley-All Rights ReservedPage 27Computer Systems Organization and Architecture-Solutions Manual19.Copyright 2001 Addison Wesley-All Rights ReservedPage 28Computer Systems Organization and Architecture-Solutions Manual20.Copyright 2001 Addison Wesley-All Rights ReservedPage 29Computer Systems Organization and Architecture-Solutions Manual21.Copyright 2001 Addison Wesley-All Rights ReservedPage 30Computer Systems Organization and Architecture-Solutions Manual22.Memory subsystem:A J d r e S s 5Copyright 2001 Addison Wesley-All Rights ReservedPage 31Computer Systems Organization and Architecture-Solutions Manual22(continued).I/O subsystem:Copyright 2001 Addison Wesley-All Rights ReservedPage 32Computer Systems Organization and Architecture-Solutions ManualChapter 51.a)a：w x,y zb)a:W Xa:r-zC)a:W X.l/普XFCopyright 2001 Addison Wesley-All Rights ReservedPage 33Computer Systems Organization and Architecture-Solutions ManualCopyright 2001 Addison Wesley-All Rights ReservedPage 34Computer Systems Organization and Architecture-Solutions ManualA7x7)/)z7l7abcdecghx)zn/)zzlabedengh2)z!/J/!/)zlz!/abcdecghs0011 0010 0000 01000100 1100 1000 00010011()010 0000 01010100 1100 1000 00011011()010 0000 01001100 1100 1000 00011001 0000 0010 00000000 1001 1001 00000000 0111 0010 10100100 0001 110()10100000 OH 1 0010 10111100 0001 110()10101000 0111 0010 10101100 0001 1100 10100011 1001 0101 00000000 1000 0011 1001io n ooio m i oooo0010 1100 1011 1100io n ooio m i oooo0010 1100 1011 11000011 0010 1111 oooo0010 1100 1011 11001001 0111 1000 oooo0000 0101 1001 0111Copyright 2001 Addison Wesley-All Rights ReservedPage 35Computer Systems Organization and Architecture-Solutions Manual11.a)Copyright 2001 Addison Wesley-All Rights ReservedPage 36Computer Systems Organization and Architecture-Solutions Manuala)zX,X)/xzA r7X.5 AX?E AX。9 八)xzuzXI/XJ7)/!/abcdeng工X-XO,(n-l)-lX(n-2)-0-X(n-3)-0,0X(n-2)-0-X(n-1)-1X