超大规模集成电路2017年秋段成华老师第一次作业(共5页).docx

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1、精选优质文档-倾情为你奉上Assignment 1:冉文浩 60161. Give a formal or descriptive definition for each of the following terms.专心-专注-专业l ITRS,1l Gate-Equivalent,1l Technology Nodes,1 l Feature size,1l IC design complexity sources,1l Behavioral representation,1l Abstraction hierarchy,1l IC design,1l Synthesis,1l Refin

2、ement,1l System-level synthesis,1l Logic synthesis,1l Layout synthesis,1l Partial design tree,l Design window,1l Digital design space,1l Static timing analysis,1l Behavioral simulation,1l Post place and route simulation,1l Composition-based approach.12. Access the Internet for information about Dani

3、el D. Gajskis “Y-chart” methodology for integrated circuits design. According to your investigation of the related research papers and/or technical reports, please summarize the “Y-chart” theory, including (1) design representation domains, (2) design abstraction hierarchy and (3) design activities.

4、 References must be listed at the end of your report.3. Write a summary in Chinese of the paper “A New Ear in Advanced IC Design” (in less than 200 characters).1. Give a formal or descriptive definition for each of the following terms.ITRS：International Technology Roadmap for Semiconductor(国际半导体技术发展

5、路线图)Gate-Equivalent：A gate equivalent (GE) stands for a unit of measure which allows to specify manufacturing-technology-independent complexity of digital electronic circuits. It corresponds to a two input NAND gateTechnology Nodes：DRAM 结构里第一层金属的金属间距(pitch)的一半Feature size：roughly half the length of

6、the smallest transistor(芯片上的最小物理尺寸)IC design complexity sources: It includes four main metrics：reliability、cost、performance and power consumption. It also includes four complexity sources：large size、variability and reliability、power dissipation and heterogeneity.Behavioral representation: Represents

7、 a design as a black box and its outputs in terms of its input and time. Indicates no geometrical information or structure information. Tables the form of text, math or algorithm.Abstraction hierarchy： Abstraction hierarchies are a human invention designed to assist people in engineering every compl

8、ex systems by ignoring unnecessary details. A set of interrelated representation levels that allow a system to be represented in varying amounts of details. It includes six levels：system level、chip/algorithm level、RTL、logic gate level、circuit level、layout/silicon levelIC design: An integrated circui

9、t is a set of electronic circuits on one small flat piece (or chip) of semiconductor material, normally silicon.(在以小片半导体材料上面设计大量的集成电路)Synthesis：将高层次的信息转换成低层次的描述，具体是指将行为域的信息转换成结构域的信息。Some of the macro-cell(logic gate) are compiled from a functional description.Refinement: 将行为域的信息直接转换成几何域的信息的过程。System

10、-level synthesis: Mapping a task level specification onto a heterogeneous hardware/software architectureLogic synthesis：It is a process by which an abstract form of desired circuit behavior, typically at register transfer level (RTL), is turned into a design implementation in terms of logic gates, t

11、ypically by a computer program called a synthesis toolLayout synthesis: It also call silicon compiler. It automatically translates the function description of an integrated circuit in a Lisp-like language to layout.(将逻辑信息翻译成电路的版图信息，从而制作相应的mask板)Partial design tree： 设计过程形成了一个部分树他的行为在不同的层级是确定的，常常在完成设计

12、之前用来评估系统组分之间的关系。部分设计树包括自下而上和自上而下两种概念。Design window： We mean a range of levels over which the designer works in developing a design-tree structure.Digital design space: 为了达到一定的客观标准，进行了分区。这些标准是设计中必须考虑的主要因素。Static timing analysis: 静态时序分析不需要对整个电路进行仿真就能对数字电路的预期时间进行仿真模拟。Behavioral simulation：也叫做前仿真，主要是为了验

13、证设计逻辑，不考虑延时问题。It also called agent-based simulation, are instrumental in tackling the ecological and infrastructure challenges of our society. These simulations allow scientists to understand large complex system such as transportation network, insect swarms, or fish schools by modeling the behavior

14、 of millions if individual agents inside the system.Post place and route simulation: 后仿真和线路仿真是综合、布线以后，电路的最终形式已经固定下来，得到综合出的网表，这时在加上器件物理模型进行仿真， 得到更精确的时延。在这一个步骤，确定布局后对门级电路的精确时间延迟进行重新仿真，来检查电路的时序，并对电路功能进行最后的检查。位置和线路模拟允许你去模拟一个设计的时间信息，例如门延迟信息，它可以帮助你检查出之间没有发现的错误。Composition-based approach：A new composition-

15、based approach shifts the focus from content creation to the problems of evaluating, integrating, and verifying multiple pre-existing blocks and software components.2. Access the Internet for information about Daniel D. Gajskis “Y-chart” methodology for integrated circuits design. According to your

16、investigation of the related research papers and/or technical reports, please summarize the “Y-chart” theory, including (1) design representation domains, (2) design abstraction hierarchy and (3) design activities. References must be listed at the end of your report.Y-chart理论是Daniel D. Gajski 在1983年

17、提出的，虽然事隔这么多年，但这个理论非常有用，他有助于帮助设计师简化集成电路的设计过程，将一个十分复杂的电路问题简化成一个相对简单的问题，在VHDL上面有着非常广泛的应用，是设计师对于抽象问题有着更清晰的认识，只要我们知道了其中某个域的某一级信息，就可以推倒到其他域的其他层的信息。改变了原先的计算机辅助设计（CAD），变成了计算机自动设计和优化版图以及连线布局，显著的提高了设计师的设计效率，对现在的设计语言产生了非常深远的影响。(1) design representation domains: It includes three domainsBehavioral (function) Re

18、presentation: Represents a design as a black box and its outputs in terms of its input and time. Indicates no geometrical information or structure information. Takes the form of text, math or algorithm.Structure representation: A black box is represented as a set of components and connections. It ac

19、ts as a bridge between functional(behavioral) and geometrical representation. It doesnt include physical information.Geometrical representation: It specifics size(height and width), the position of each component, each port and connection on the silicon substances. Geometrical shapes represent regio

20、ns of diffusion polysilicon and metal on silicon surface. It includes mask information.(2) design abstraction hierarchy:A set of interrelated representation levels that allow a system to be represented in varying amounts of details. It includes six levels：system level、chip/algorithm level、RTL level、

21、logic gate level、circuit level、layout/silicon level. Every representation include these six levels. If designers have adequate information, they can describe this system in a easy method.(3) design activities:Synthesis: It translates the information of functional(behavioral) representation in the ab

22、straction hierarchy into the information of structural representation.Analysis: It translates the information of structural representation in the abstraction hierarchy into the information of functional(behavioral) representation.Refinement: It translates the information of functional(behavioral) re

23、presentation in the abstraction hierarchy into the information of geometrical representation.Abstraction：It translates the information of geometrical representation in the abstraction hierarchy into the information of functional(behavioral) representation.Extraction: It translates the information of

24、 geometrical representation in the abstraction hierarchy into the information of structural representation.Generation: It translates the information of structural representation in the abstraction hierarchy into the information of geometrical representation.The synthesis includes:System synthesis: I

25、t translates the information of function(behavior) representation in the flowcharts or algorithm into the information of structure representation in processors, memories or buses.RTL synthesis: It translates the information of function(behavior) representation in the register-transfer into the infor

26、mation of structure representation in the registers, ALUs, MUXs.Logic synthesis: It translates the information of function(behavior) representation in the boolean expressions into the information of structure representation in the gates, flip-flops.Circuit synthesis: It translates the information of

27、 function(behavior) representation in the transistor functions into the information of structure representation in the transistors.1 Gajski D, Kuhn R H. New VLSI Tools - Guest Editors IntroductionJ. IEEE Computer, 1983, 16(44):11-14.3. Write a summary in Chinese of the paper “A New Ear in Advanced I

28、C Design” (in less than 200 characters). 随着IC的发展，传统的设计流程存在问题：IP核专业化；芯片上的处理器的数量众多而复杂，验证困难；缺少面向Si的嵌入式软件；后期验证和分析复杂系统耗时。SoC设计能够很好的解决这些问题。 SoC设计是基于组合的设计方法，关注早期设计阶段。SoC设计与传统的设计有4个主要的不同：更深的系统级设计和分析；使用普遍的方法并行设计和分析HW/SW；多层次的验证方法，在早期实现并发的软件和硬件的验证，减少后期验证，验证速度快；使用咨询来填补SoC基础设施的缺失。SoC采用通用的IP块，尽量不修改它。 但是，SoC设计存在不成熟、成本高和不确定性的缺点，使得设计师不愿意采用这种设计。相信，随着技术的进步，新的设计工具的出现SoC的这些缺点将会得到改进。SoC将会在未来有着十分广泛的应用。