接口转换芯片【GL842】详细的英文版开发资料.pdf

《接口转换芯片【GL842】详细的英文版开发资料.pdf》由会员分享，可在线阅读，更多相关《接口转换芯片【GL842】详细的英文版开发资料.pdf（64页珍藏版）》请在淘文阁 - 分享文档赚钱的网站上搜索。

1、Xu062 f GL842 USB 2.0 2-in-1 Scanner Controller Datasheet Revision 1.00 Nov.14,2003 Genesys Logic,Inc.GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 2 Copyright:Copyright 2003 Genesys Logic Incorporated.All rights reserved.No part of the materials may be reproduce

2、d in any form or by any means without prior written consent of Genesys Logic Inc.Disclaimer:ALL MATERIALS ARE PROVIDED AS IS WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND.NO LICENSE OR RIGHT IS GRANTED UNDER ANY PATENT OR TRADEMARK OF GENESYS LOGIC INC.GENESYS LOGIC HEREBY DISCLAIMS ALL WARRANTIES

3、 AND CONDITIONS IN REGARD TO MATERIALS,INCLUDING ALL WARRANTIES,IMPLIED OR EXPRESS,OF MERCHANTABILITY,FITNESS FOR ANY PARTICULAR PURPOSE,AND NON-INFRINGEMENT OF INTELLECTUAL PROPERTY.IN NO EVENT SHALL GENESYS LOGIC BE LIABLE FOR ANY DAMAGES INCLUDING,WITHOUT LIMITATION,DAMAGES RESULTING FROM LOSS OF

4、 INFORMATION OR PROFITS.PLEASE BE ADVISED THAT THE MATERIALS MAY CONTAIN ERRORS OR OMMISIONS.GENESYS LOGIC MAY MAKE CHANGES TO THE MATERIALS OR TO THE PRODUCTS DESCRIBED THEREIN AT ANY TIME WITHOUT NOTICE.Trademarks:is a registrated trademark of Genesys Logic Inc.All trademarks are the properties of

5、 their respective owners.Office:Genesys Logic,Inc.12F,No.205,Sec.3,Beishin Rd.,Shindian City,Taipei,Taiwan Tel:(886-2)8913-1888 Fax:(886-2)6629-6168 http:/ GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 3 Revision History Revision Date Description 1.00 11/14/2003

6、First formal release GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 4 TABLE OF CONTENTS CHAPTER 1 GERERAL DESCRIPTION.6 CHAPTER 2 FEATURES.7 CHAPTER 3 PIN ASSIGNMENT.8 3.1 PINOUTS.8 3.2 PIN LIST.9 3.3 PIN DESCRIPTIONS.10 CHAPTER 4 REGISTERS.14 4.1 REGISTERS BASE A

7、DDRESS.14 4.2 REGISTER DESCRIPTIONS.18 4.3 REGISTER MAPPING.52 4.3.1 Shading Mapping(Chunky for Single Bank).52 4.3.2 Shading Mapping(Planer).52 4.3.3 Slope Curve Table Mapping.53 4.3.4 Image Buffer Mapping.53 CHAPTER 5 BLOCK DIAGRAM.54 5.1 USB2.0 SYSTEM BLOCK DIAGRAM.54 5.2 FUNCTION BLOCK DIAGRAM.5

8、4 CHAPTER 6 FUNCTIONAL DESCRIPTION.55 CHAPTER 7 ELECTRICAL CHARACTERISTICS.62 7.1 ABSOLUTE MAXIMUM RATINGS(VOLTAGE REFERENCED TO GND).62 7.2 DC CHARACTERISTICS(DIGITAL PINS):3.3 V LOGIC CORE OR PADS.62 7.3 DC CHARACTERISTICS(DIGITAL PINS):5.0 V PADS.63 7.4 DC CHARACTERISTICS(D+/D-).63 CHAPTER 8 PACK

9、AGE DIMENSION.64 GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 5 LIST OF FIGURES FIGURE 3.1-PINOUT DIAGRAM.8 FIGURE 5.1-USB2.0 SYSTEM BLOCK DIAGRAM.54 FIGURE 5.2-FUNCTION BLOCK DIAGRAM.54 FIGURE 8.1-GL842 128 PIN QFP PACKAGE.64 LIST OF TABLES TABLE 3.1-PIN LIST.9

10、 TABLE 3.2-PIN DESCRIPTIONS.10 TABLE 4.1-BASE ADDRESS FOR REGISTERS.14 TABLE 4.2-SHADING MAPPING(CHUNKY FOR SINGLE BANK).52 TABLE 4.3-SHADING MAPPING(PLANER).52 TABLE 4.4-SLOPE CURVE TABLE MAPPING.53 TABLE 4.5-IMAGE BUFFER MAPPING.53 TABLE 7.1-ABSOLUTE MAXIMUM RATINGS(VOLTAGE REFERENCED TO GND).62 T

11、ABLE 7.2-DC CHARACTERISTICS(DIGITAL PINS):3.3 V LOGIC CORE OR PADS.62 TABLE 7.3-DC CHARACTERISTICS(DIGITAL PINS):5.0 V PADS.63 TABLE 7.4-DC CHARACTERISTICS(D+/D-).63 GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 6 CHAPTER 1 GERERAL DESCRIPTION Genesys Logics sing

12、le-chip GL842(GeneScanTM series)is a high speed,high performance,low cost and rich scalability controller for scanner.It successfully integrates scanner function ASIC and USB 2.0 interface controller into one single-chip.With its high performance design architecture,GL842 is not only ready for suppo

13、rting CIS or CCD image sensors(600dpi,1200dpi or 2400dpi resolution)that are used in flatbed or transparency scanners,but is able to co-work with uni-polar or bi-polar stepping motors.Advanced features of GL842 include five motor acceleration/deceleration curve tables for high speed motor moving.GL8

14、42 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 7 CHAPTER 2 FEATURES?Highly integrated scanner controller chip.(2-in-1;Scanner Controller and USB 2.0 Interface)?USB 2.0 High Speed(480Mbit)compliance.(USB 2.0 High Speed logo certified)?Design for sheetfed,flatbed and t

15、ransparency scanner.?12MHz Low frequency clock input required for better EMI.?Flexible 3.3V/5V power selection for pad I/O.?Adjustable working speed for different usage.?Fast operation speed.(0.3us/pixel.in 40MHz working clock)?It costs only 12 seconds for 600dpi A4 size color scanning.?Available se

16、nsor types:600,1200 and 2400dpi color CIS or CCD.?Support linear or stagger CCD,such as NEC,Toshiba or Sony CDD.?Support 48-Bits color(16-Bits gray level)scanning.?Support color,fine Gray,fast gray and fast B/W scan for CDD.?Support color,gray,true gray and B/W scan for CIS.?Support three scanning t

17、ypes:pixel by pixel(pixel rate),line by line(line rate)and RGB line by turns(line rate).?16 bits white/dark shading and 16-to-8 bits Gamma correction.?Support digital average and hardware deletion pixel function for speeding up low resolution scan.?Support hardware deletion type for DPI function(240

18、0 to 1 DPI,1 DPI decrement).?Programmable threshold level for B/W.?Exposure time is adjustable(1 pixel time increment step).?Scan width(scan area)control for horizontal line(1 pixel increment step).?Support 256K*16,256K*16*2 and 1M*16 bits EDO-DRAM.?Support 5 acceleration/deceleration motor tables f

19、or detailed controllable high speed motor moving.?Support controllable bipolar motor in full,half and quarter steps moving.?Support controllable uni-polar motor in full and half steps moving.?Build-in PWM control phase for uni-polar motor.?Programmable dummy lines to resolve start/stop(discontinuous

20、)problem.?Watch dog protect for lamp,motor and ASIC.?Lamp timeout(sleeping)control.?Support 16 GPIO pins and 2 GPO pins.?Output motor trigger signal under scanning for ADF.?2 Output ports for lamp(include flatbed and transparency with PWM)control.?Input port for home sensor.?Power on check status.?S

21、upport LED Blinking.?Support Back Scanning.GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 8 CHAPTER 3 PIN ASSIGNMENT 3.1 Pinouts GL842PQFP-12891011121314151617181920212223242526272829303132234567GPIO2GPIO3GPIO4GPIO5GPIO6GPIO7GPIO8GPIO9GPIO10GPIO11GPIO12GPIO13/MOTO

22、RTGOGPIO14VccCore1GndCore1GPIO15GPIO16Vccio1Gndio1MRT_SEL0MTR_SEL1LAMP_SWXPA_SWLED_BMT_PH0GPIO1DGND1DVCC1AGND1X1X2AVCC1189493929190898887868584838281807978777675747372711011009998979695102DBUS0ABUS9ABUS8ABUS7Gndio5Vccio5ABUS6ABUS5ABUS4ABUS3ABUS2ABUS1GndCore3VccCore3ABUS0NWEXNOEXRASXCASXNWEYGndio4Vcc

23、io4NOEYRASYCASYDBUS1DBUS2DBUS3DBUS4DBUS5DBUS6DBUS75049484746454443424140395756555453525158SDISDOGndio2Vccio2OP7OP6OP5OP4OP3OP2OP1OP0MT_PH7VccCore2GndCore2SCLKSEN/SLOADBSMP/CDSCLK1VSMP/CDSCLK2MCLK/ADCCLK111112113114115116117118119120121104105106107108109110103DBUS13DBUS14DBUS15VccCore4GndCore4TSTSEL0

24、TSTSEL1EXTRST_NC or DGNDDVCC0DGND0RPUDBUS12DBUS11DBUS10DBUS9DBUS8Gndio6Vccio633MT_PH134MT_PH235MT_PH336MT_PH437MT_PH538MT_PH6605961CCD_TGXCCD_CK1XCCD_CK3X636264CCD_CPXVccio3Gndio368676665CCD_CK4XCCD_CK2XHOMECCD_RSX7069CCD_TGBCDD_TGG125126127128DMFDMHAGNDRREF123124DPFDPH122AVDD Figure 3.1-Pinout Diag

25、ram GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 9 3.2 Pin List Table 3.1-Pin List Pin#Pin Name Type Pin#Pin NameType Pin#Pin NameType Pin#Pin Name Type1 AVCC1 P 33 MT PH1O65 CCD RSXO97 DBUS2 B2 X2 I/O 34 MT_PH2 O66 HOME I 98 DBUS3 B3 X1 I 35 MT_PH3 O67 CCD_CK2X

26、O99 DBUS4 B4 AGND1 P 36 MT_PH4 O68 CCD_CK4XO100 DBUS5 B5 DVCC1 P 37 MT_PH5 I/O69 CCD_TGG O101 DBUS6 B6 DGND1 P 38 MT_PH6 O70 CCD_TGB O102 DBUS7 B7 GPIO1 B 39 MT_PH7 O71 CASY O103 Vccio6 P8 GPIO2 B 40 OP0 I 72 RASY O104 Gndio6 P9 GPIO3 B 41 OP1 I 73 NOEY O105 DBUS8 B10 GPIO4 B 42 OP2 I 74 Vccio4 P106

27、 DBUS9 B11 GPIO5 B 43 OP3 I 75 Gndio4 P107 DBUS10 B12 GPIO6 B 44 OP4 I 76 NWEY O108 DBUS11 B13 GPIO7 B 45 OP5 I 77 CASX O109 DBUS12 B14 GPIO8 B 46 OP6 I 78 RASX O110 DBUS13 B15 GPIO9 B 47 OP7 I 79 NOEX O111 DBUS14 B16 GPIO10 B 48 Vccio2 P80 NWEX O112 DBUS15 B17 GPIO11 B 49 Gndio2 P81 ABUS0 O113 VccC

28、ore4 P18 GPIO12 B 50 SDO I 82 VccCore3 P114 GndCore4 P19 GPIO13/MOTORTGOB 51 SDI O83 GndCore3 P115 TSTSEL0 I 20 GPIO14 B 52 VccCore2 P84 ABUS1 O116 TSTSEL1 I 21 VccCore1 P 53 GndCore2 P85 ABUS2 O117 EXTRST_ I 22 GndCore1 P 54 SCLK O86 ABUS3 O118 NC or DGNDP23 GPIO15 B 55 SEN/SLOADO87 ABUS4 O119 DVCC

29、0 P24 GPIO16 B 56 BSMP/CDSCLK1O88 ABUS5 O120 DGND0 P25 Vccio1 P 57 VSMP/CDSCLK2O89 ABUS6 O121 RPU-26 Gndio1 P 58 MCLK/ADCCLKO90 Vccio5 P122 AVDD P27 MTR_SEL0 I 59 CCD_TGX O91 Gndio5 P123 DPF I/O28 MTR_SEL1 I 60 CCD_CK1XO92 ABUS7 O124 DPH I/O29 LAMP_SW O 61 CCD_CK3XO93 ABUS8 O125 DMF I/O30 XPA_SW O 6

30、2 CCD_CPX O94 ABUS9 O126 DMH I/O31 LED_B O 63 Vccio3 P95 DBUS0 B127 AGND P32 MT_PH0 O 64 Gndio3 P96 DBUS1 B128 RREF-GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 10 3.3 Pin Descriptions Table 3.2-Pin Descriptions Support IO Ports Interface Pin Name Pin#Type ASIC

31、I/OCell Description GPIO116 720,23,24 B hbd16rsc General Purpose Input/Output MT_PH04 3236 O(pd)hbd16dhkMT_PH57 3739 O hbd16rscBi-polar(3955):MT_PH7=PHASE_A MT_PH6=PHASE_B MT_PH5=D2A MT_PH4=D1A MT_PH3=D0A MT_PH2=D2B MT_PH1=D1B MT_PH0=D0B Bi-polar(2916 or 6219):MT_PH5=PHASE1 MT_PH4=PHASE2 MT_PH3=I11

32、MT_PH2=I01 MT_PH1=I12 MT_PH0=I02 Uni-polar(2003):MT_PH3=PHASE A MT_PH2=PHASE B MT_PH1=PHASE/A MT_PH0=PHASE/B MOTORTGO/GPIO13 19 O hbd16rsc Output motor trigger for ADF scanning or GPIO13 HOME 66 I(pu)hbd16uhk Sense carriage home position CCD/CIS Control Signals Interface Pin Name Pin#Type ASIC I/OCe

33、ll Description CCD_CK1X 60 O hbd16rsc CCD Shift register clock1 or CIS clock output CCD_CK2X 67 O hbd16rsc CCD Shift register clock2 or CIS clock output CCD_CPX 62 O hbd16rsc CCD Clamp gate clock or CIS clock output CCD_RSX 65 O hbd16rsc CCD Reset gate clock or CIS clock output CCD_TGX 59 O hbd16rsc

34、CCD Transfer gate clock for R channel or CIS Line start pulse CCD_TGG 69 O hbd16rsc CCD Transfer gate clock for G channel CCD_TGB 70 O hbd16rsc CCD Transfer gate clock for B channel CCD_CK3X 61 O hbd16rsc CCD Shift register clock3 CCD_CK4X 68 O hbd16rsc CCD Shift register clock4 LAMP_SW 29 O hbd16rs

35、cFlatbed lamp power control or CIS Red LED array control GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 11 XPA_SW 30 O hbd16rscTransparency lamp power control or CIS Green LED array control LED_B 31 O hbd16rsc CIS Blue LED array control FRONT-END Interface Pin Nam

36、e Pin#Type ASIC I/OCell Description OP07 4047 I(pd)hbd16dhk AFE digital data input SEN/SLOAD 55 O(pd)hbd16dhk Serial interface load pulse SCLK 54 O hbd16rsc Serial interface clock output SDI 51 O(pd)hbd16dhkSerial data output SDO 50 I(pd)hbd16dhkSerial data input BSMP/CDSCLK1 56 O hbd16rscWolfson ty

37、pe:Video sample synchronization pulse Analog Device:CDS Reference level sampling clock VSMP/CDSCLK2 57 O hbd16rscWolfson type:Video sample synchronization pulse Analog Device:CDS Data level sampling clock MCLK/ADCCLK 58 O hbd16rscWolfson type:Master clock.Analog Device:A/D Converter sampling clock.D

38、RAM Interface Pin Name Pin#Type ASIC I/OCell Description DBUS015 95102,105112 B(pd)hbd16dhk DRAM data bus ABUS09 81,8489,9294 O(pd)hbd16dhk DRAM address bus RASX 78 O(pd)hbd16dhk DRAM RAS signal of first memory chip CASX 77 O(pd)hbd16dhk DRAM CAS signal of first memory chip NOEX 79 O(pd)hbd16dhk DRA

39、M OE(output enable)signal of first memory chip NWEX 80 O(pd)hbd16dhk DRAM WE signal of first memory chip RASY 72 O(pd)hbd16dhk DRAM RAS signal of second memory chip CASY 71 O(pd)hbd16dhk DRAM CAS signal of second memory chip NOEY 73 O(pd)hbd16dhk DRAM OE(output enable)signal of second memory chipNWE

40、Y 76 O(pd)hbd16dhk DRAM WE signal of second memory chip GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 12 Miscellaneous Pin Name Pin#Type ASIC I/OCell Description TSTSEL1:0 116,115 I(pd)hbd16dhk To select mode:Normal mode=0 MTR_SEL1:0 28,27 I(pd)hbd16dhkMTR_SEL1:0

41、=10 select Bi_polar 3955 MTR_SEL1:0=01 select Bi_polar 2916 OR 6219 MTR_SEL1:0=00 select Uni_polar 2003 X1 3 I-Clock input for crystal(12MHz)X2 2 I/O-Clock output for crystal EXTRST_ 117 I Hbd8rteu Hardware reset input USB Interface Pin Name Pin#Type ASIC I/OCell Description NC or DGND 118 P-NC or U

42、SB shield ground RPU 121-3.3V Pull up control for DPF DPF 123 I/O-Positive USB differential data(Full Speed)DPH 124 I/O-Positive USB differential data(High Speed)DMF 125 I/O-Negative USB Differential Data(Full Speed)DMH 126 I/O-Negative USB Differential Data(High Speed)RREF 128-510 reference resisto

43、r input Power/Ground Pin Name Pin#Type ASIC I/OCell Description AVDD,AVCC1 122,1 P-Analog power input for USB2.0 transceiver 3.3V AGND,AGND1 127,4 P-Analog ground input for USB2.0 transceiver DVCC0,DVCC1 119,5 P-Digital power input for USB2.0 controller 3.3V DGND0,DGND1 120,6 P-Digital ground input

44、for USB2.0 controller.VccCore14 21,52,82,113 P-Digital power input for scanner controller logic core 3.3VGndCore14,Gndio16 22,53,83,114,26,49,64,75,91,104 P-Digital ground input for scanner controller.Vccio1 25 P-For Pin7Pin39 3.3V or 5V Vccio2 48 P-For Pin40Pin58 3.3V or 5V Vccio3 63 P-For Pin59Pin

45、66 3.3V or 5V Vccio46 74,90,103 P-For Pin67116 3.3V or 5V Note:hbd16*is for 6mA;hbd8*is for 8mA.GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 13 Notation:Type O Output I Input B Bi-directional B/I Bi-directional,default input B/O Bi-directional,default output P P

46、ower/Ground A Analog SO Automatic output low when suspend pu Internal pull up pd Internal pull down odpu Open drain with internal pull up GL842 USB 2.0 2-in-1 Scanner Controller Genesys Logic Inc.All rights reserved.Page 14 CHAPTER 4 REGISTERS 4.1 Registers Base Address Table 4.1-Base Address for Re

47、gisters Offset(Hex)Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default01h CISSET DOGENB DVDSETX M16DRAMDRAMSEL SHDAREA SCAN 8h0002h NOTHOME ACDCDIS AGOHOMEMTRPWR FASTFED MTRREVHOMENEG LONGCURV 8h0003h LAMPDOG AVEENB XPASELLAMPPWRLAMPTIM3:0 8h0C04h LINEART BITSET AFEMOD1:0 FILTER1:0 FESET1:0 8h00

48、05h DPIHW1:0 MTLLAMP1:0 GMMENBX MTLBASE1:0 8h0006h SCANMOD2:0 PWRBITGAIN4OPTEST2:0 8h0007h X X X X SRAMSEL FASTDMADMASEL DMARDWR8h0008h X DECFLAG GMMFFRGMMFFG GMMFFB GMMZRGMMZG GMMZB 8h0009h MCNTSET1:0 CLKSET1:0 BACKSCANENHANCE SHORTTG NWAIT 8h000Ah X X X X X X X SRAMBUF8h000Bh X X X X X X X X-0Ch X

49、 X X X X X X X-0Dh X X X X X X X CLRLNCNT-0Eh SCANRESET-0Fh MOVE-10h EXPR15 EXPR14 EXPR13EXPR12EXPR11EXPR10EXPR9 EXPR8 8h0011h EXPR7 EXPR6 EXPR5EXPR4EXPR3EXPR2EXPR1 EXPR0 8h0012h EXPG15 EXPG14 EXPG13EXPG12EXPG11EXPG10EXPG9 EXPG8 8h0013h EXPG7 EXPG6 EXPG5EXPG4EXPG3EXPG2EXPG1 EXPG0 8h0014h EXPB15 EXPB

50、14 EXPB13EXPB12EXPB11EXPB10EXPB9 EXPB8 8h0015h EXPB7 EXPB6 EXPB5EXPB4EXPB3EXPB2EXPB1 EXPB0 8h0016h CTRLHI TOSHIBA TGINVCK1INVCK2INV CTRLINVCKDIS CTRLDIS 8h3217h TGMODE1:0 TGW5:0 8h1418h CNSET DCKSEL1:0 CKTOGGLECKDELAY1:0 CKSEL1:0 8h0019h EXPDMY7:0 8h001Ah X X MANUAL3 MANUAL1CK4INVCK3INV LINECLP X 8h