PADSPowerLogic软件培训(1).pdf

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1、?1PADS Power-Logic?08:30-09:00?09:00-09:15?(?)09:15-09:30?(?/?)09:30-10:30?(?)10:30-10:45?10:45-12:00?(?/?)12:00-13:00?13:00-13:30?(?)13:30-15:00?(?)15:00-15:15?15:15-15:45?(?)15:45-16:15?(?/?)16:15-16:30?(?/?(ECO)16:30-17:00?(?(PCB)?)17:00-17:30?A(?(OLE)?)?/?Windows 98 Windows NT(4.0)?Pentium/100MH

2、Z(?)Pentium/300MHZ(?)64 M?(?)32 M?Window 98?PowerLogic?PowerLogic?/?PowerPCB?(OLE)?X/Y?(LMB)?(?)?(?)+?(MMB)?(RMB)?7?8?9?4?6?1?2?3?0?.?:#1?#2?!?UndoRedo?(Part Type)?(Gate Decal)?Postage Stamp?Undo/Redo?#(Drafting)$%&(Design)$%&)*(Busses)$%&?(Ref Des)?/?!?!?!?!?(offpage)?(offpage)?(Ref Des)?#?!#?!#?!#

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4、AB?)?ESC?G=?GD=?SH=?W=?S=?Q=?“?(GUI)”#1?/?#2?#3?#4?Train.SCH?C?DEC?DEC?DEC?DEPart Type?/?(PartDecal)CAE?(Decal)PCB Decal?Pads StacksCAE Decal?Line Items?PADS?C3?FC3?FC3?FC3?FTraining.PT3=?(Part Type)?Training.PD3=PCB?(Decal)?Training.LD3=Logic?(Decal)?Training.LN3=?(Line)?A?BCIntel.PT3TTL.PT3USR.PT3

5、AMD.PT3Intel.PD3TTL.PD3USR.PD3AMD.PD3Intel.LD3TTL.LD3USR.LD3AMD.LD3Intel.LN3TTL.LN3USR.LN3AMD.LN3?PADS G?C?DEG?C?DEG?C?DEG?C?DENPN-12N2222NPN-1TO-18TO-18?(Logic Decal)PCB?(PCBDecal)?(Part Type)?(Lines)*.LD3*.LN3*.PT3*.PD3?G?C?45G?C?45G?C?45G?C?45-?-?/?-?-?/?(Part Type)?-?/?CAE?(Decal)(?)-?/?PCB?(Dec

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7、ecals-?Part Type?Part Type-?Part Type?Part Type?Edit Decal?Electrical.Electrical?(Part Type)?Edit Decal?(Gate)?G?UV?!G?UV?!G?UV?!G?UV?!(Electrical)?(Ref Des)?(AlphaNumeric)?(Connector)?ECO?(Registration)?G?WXG?WXG?WXG?WX(Part Type)UVUVUVUVPCB?(DECAL)?PCB Decal?Part Type?Pins?(Filter)?16?Decals?(GATE

8、S)?4?(Gate)?(Pin)?(0?)?(Pin Type)?G?WXG?WXG?WXG?WX(Part Type)UVUVUVUV?(ATTRIBUTE)?(BOM)?(SIGPIN)?(Unused Pin)?G?WXG?WXG?WXG?WX(Part Type)UVUVUVUV?(Alpha-Pins)?G?IJKG?IJKG?IJKG?IJK(Part Editor)?Y*?Y*?Y*?Y*?DEF8GHIJ?KLM?N Files/Library?(Part Type)?Tools/Part Editor?Tools/Edit Part?TOOLS/PARTEDITOR O?H

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11、Type?Set Pin Swap-?(0?)Change Seq Number-?aaaa#1?ikRl?A-?#2?ikR jL(Logic Decal)#3?ikRM?m1(Part Type)?Pg.3(11-15)?b/b/b/b/(Drafting)EF#n?o pqrstu?*9?v?w?D5_xy?z?|?_?2D?2D?cd?ecd?ecd?ecd?e?OK?Query/Modify?X?Y?fghfghfghfgh(2D-Lines)z 2D*#?w?Pzn?m1(Shape Type)?|?_?Polygon=?Circle=?Rectangle=?Path=?#1?#?

12、(Title Sheet)?Pg.4(5-6)?ij?ij?ij?ij(Design Rules)?(Default Rules)?(Extended Rules)?(Extended Rules Set)?(Default Rules)?(Net Rules)?(Extended Rules)?(Conditional Rules)?(Differential Pairs)?(Class Rules)?klmnijklmnijklmnijklmnij(Net Rule)?(Net Rule)?Setup/Design Rule.?Net Rule?(Rules)?(?(Clearance)?

13、(Routing)?(Hispeed)?OK?Close?ijoWijoWijoWijoW?(Clearance Rules)=?(Routing Rules)=?PCB?(HiSpeed Rule)=?(Parallelism)?(Delay)?(Capacitance)?(Impedance)?PCB?pqrspqrspqrspqrs(Clearance)?tuH?tuH?tuH?tuHTrace Width?Clearance?Same Net?Other?Drill to Drill?Bodyto Body?.?vhvhvhvhijijijij(Routing Rules)?Setup

14、/Design Rules/Default/Routing.?(?(net)?(class)?)LENTH MINIMIZATIONLength Minimization?(connection)None-?Horizontal-?Vertical-?Serial Source-?(ECL)Parallel Source-?Mid-Drive-?(connection)?vhvhvhvhijijijij(Routing Rules)Routing Options-?ROUTING OPTIONSCopper Sharing-?Auto Route-?(connection)Allow Ripu

15、p-?Allow Shove Protected-?Priority-?Available layers-?Selected Layers-?Available Vias-?Selected Vias-?wijwijwijwij(Non-Default)?x?x?x?x%?g?pqW?S?_?Q?m1?P?%?C?R?H(Clearance?Routing 9 HiSpeed)?gyqS?ij?yzij?yzij?yzij?yz?HIpq/?N 1)?(Pull Down)?2)?PCB?3)?(Pin Pair)?(Group)?(Net)?(Class)?(Default)?|ij|ij|

16、ij|ij(Extended Rule Set)?(Class Rules)?(Conditional Rules)?(Differential Pairs)?(Class Rules)?(Conditional Rules)?A?10 mil?(clearance)?B?15 mil?(clearance)?A?50 mils?(clearance)?(Differential Pairs)?|ij|ij|ij|ij(Extended Rule Set)?=?(Extended Rules)?DEF:N?(Class)?(Layer Rules)?A?12 mil?4?8 mils?ij?i

17、j?ij?ij(Conditional Rules)?(Conditional Rules)?PowerPCB?(Source Object)?(Against Object)?(Layer)?(Clearance)?Create?Matrix?ij?ij?ij?ij?Net?Class?yyyy(Layer)?t?t?t?t?(?(dielectric)?(thickness)?PCB?y?y?y?y?WX?WX?WX?WX(Layer Type)?F?F?F?F?(Name)?2?(Electrical)?(Non Electrical)?(Electrical)?(Non Electri

18、cal)?(Electrical Layers)?(Component)?(Planes)?(Routing Layers)?(Non Electrical Layers)?(Silkscreen)?(Paste Mask)?(Solder Mask)?(Layer Names)?(Electrical Layers)?(documentation layers)?y?y?y?y?WX?WX?WX?WX(Layer Type)?F?F?F?F?(Name)?(Top Layers)?(Bottom Layers)?(Component Layers)?(documentation layers

19、)?(electrical layers)?(Top)?(Bottom)?(Silkscreen Top)?(Silkscreen Bottom)?(Assembly Top)?(Assembly Bottom)?(Routing layers)?(Componentlayers)?(Plane Layers)?(power)?(gnd)?(thermal?(Plane layers)?(split mixed)?(copper poured)?PowerLogic V3?(Thickness)?(EDC)?(Impedance)?(capacitance)?(delay)?y?y?y?y?W

20、X?WX?WX?WX(Layer Type)?F?F?F?F?(Name)?Increase?Reassign?OK?kl?5/kl?5/kl?5/kl?5/?Design?Add Part?browse?kl?5/kl?5/kl?5/kl?5/?Items?OK?(?U?IC?R?)?OK?kl?5/kl?5/kl?5/kl?5/?DelCorners,?Angles?OffPage?(Gnd)?(Pwr)?(Gnd)?(Pwr)?#1 (kR;#?Pg.5(18-20)?6?6?6?6?/b/b/b/b/(Print/Plot)?PowerLogic.INI?(Scale)?(offset

21、s)?(Orientation)?(Plotting)?(Plot)?(Photo Plot)?(Device type)?!?!?!?!?(Option)?!?!?!?!?(?90?)?(offset)?(?)?X/Y?3?W?a?3?W?a?3?W?a?3?W?a#1 56/#-?File/Print-Plot-?PENPLOT-?SHEETS(?)-?(ADD)-?SHEET?Deselect?-?PREVIEW?-?(Options)-?(Scale)?(Offset)?(Preview Area)?3?3?3?3?Unused?Part Statistics?Net Statisti

22、cs?Limits?(?)?Off page?X/Y?Bill Of Materials?File/Reports?6?!?!?!?!Delimiters=?Format Options=?BOM?File Format=?BOM?Save Format=?Part Attribute=?BOM?Field Header=?BOM?Width=?(Bill Of Materials)?Format?“Sort Field”?m?m?m?m?(Netlist)?PCB?(PartAttribute)?PowerPCB V2?V3?Tools/Netlist to PCB?OK?#1?ikR?r(Netlist)9?Y(BOM)?Pg.6-10?(Interprocess Communication(IPC)?PowerLogic?PCB?PCB?PCB?PCB?PCB?(?)?PCB?PCB?(Netlist)?PCB?#1?(IPC)?PCB?(Cross Probe)?Pg.7-3?718?1?10?A?200233?021-54187052?54620393?021-54187052?