Lesson 20 Flip-Flop电子技术专业英语教程.pptx
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1、Lesson 20 Flip-Flop电子技术专业英语教程冯新宇 主编电子工业出版社电子工业出版社 Unit7 Digital Logic Circuit2021/9/121电子技术专业英语教程Lesson 20 Flip-FlopBackgroundsText tour Language in useVocabulary Structure Reading/writing techniques2021/9/122电子技术专业英语教程Terminology multivibratorn.【计】多谐振荡器field effect transistor【计】场效应晶体管shift register
2、移位寄存器Backgrounds2021/9/123电子技术专业英语教程Text tour Outline Flip-flop Flip-flops inventionSimple flip-flopsClocked flip-flopsThe type of flip-flopsSetreset flip-flops(SR flip-flops)Trigger flip-flops(T flip-flops)JK flip-flopD flip-flop2021/9/124电子技术专业英语教程Flip-flopIn digital circuits,a flip-flop is a term
3、 referring to an electronic circuit(a bistable multivibrator)that has two stable states and thereby is capable of serving as one bit of memory.Today,the term flip-flop has come to mostly denote non-transparent(clocked or edge-triggered)devices,while the simpler transparent ones are often referred to
4、 as latches;however,as this distinction is quite new,the two words are sometimes used interchangeably.A flip-flop is usually controlled by one or two control signals and/or a gate or clock signal.The output often includes the complement as well as the normal output.As flip-flops are implemented elec
5、tronically,they require power and ground connections.2021/9/125电子技术专业英语教程Flip-flops inventionThe first electronic flip-flop was invented in 1918 by William Eccles and F.W.Jordan.It was initially called the Eccles-Jordan trigger circuit and consisted of two active elements.The name flip-flop was late
6、r derived from the sound produced on a speaker connected to one of the back coupled amplifiers outputs during the trigger process within the circuit.This original electronic flip-flopa simple two-input bistable circuit without any dedicated clock signal was transparent,and thus a device that would b
7、e labeled as a latch in many circles today.2021/9/126电子技术专业英语教程Simple flip-flopsSimple flip-flops can be built around a pair of cross-coupled inverting elements:vacuum tubes,bipolar transistors,field effect transistors,inverters,and inverting logic gates have all been used in practical circuits-perh
8、aps augmented by some gating mechanism.The more advanced clocked devices are specially designed for synchronous systems;such devices therefore ignore its inputs except at the transition of a dedicated clock signal.This causes the flip-flop to either change or retain its output signal based upon the
9、values of the input signals at the transition.Some flip-flops change output on the rising edge of the clock,others on the falling edge.2021/9/127电子技术专业英语教程Clocked flip-flopsClocked flip-flops are typically implemented as master-slave devices where two basic flip-flops(plus some additional logic)coll
10、aborate to make it insensitive to spikes and noise between the short clock transitions;they nevertheless also often include asynchronous clear or set inputs which may be used to change the current output independent of the clock.2021/9/128电子技术专业英语教程The type of flip-flops Flip-flops can be further di
11、vided into types that have found common applicability in both asynchronous and clocked sequential systems:the SR(set-reset),D(data or delay),T(trigger),and JK types are the common ones;all of which may be synthesized from other types by a few logic gates.The behavior of a particular type can be desc
12、ribed by what is termed the characteristic equation,which derives the next(i.e.,after the next clock pulse)output,Qnext,in terms of the input signal(s)and/or the current output,Q.2021/9/129电子技术专业英语教程Setreset flip-flops(SR flip-flops)The fundamental latch is the simple SR flip-flop,where S and R stan
13、d for set and reset respectively.It can be constructed from a pair of cross-coupled NAND or NOR logic gates.The stored bit is present on the output marked Q.SR Flip-Flop operationCharacteristic tableExcitation tableSRActionQ(t)Q(t+1)SRAction00Keep state000 xNo change01Q=00110Set10Q=11001Reset11Unsta
14、ble combination11x0No change2021/9/1210电子技术专业英语教程Setreset flip-flops(SR flip-flops)Normally,in storage mode,the S and R inputs are both low,and feedback maintains the Q and outputs in a constant state,with the complement of Q.If S is pulsed high while R is held low,then the Q output is forced high,a
15、nd stays high even after S returns low;similarly,if R is pulsed high while S is held low,then the Q output is forced low,and stays low even after R returns low.Figure 20-1 shows the symbol for a SR latch.Figure 20-1 The symbol for a SR latch2021/9/1211电子技术专业英语教程Trigger flip-flops(T flip-flops)If the
16、 T input is high,the T flip-flop changes state(toggles)whenever the clock input is strobed.If the T input is low,the flip-flop holds the previous value.This behavior is described by the characteristic equation:(or,without benefit of the XOR operator,the equivalent:)and can be described in a truth ta
17、ble:T Flip-Flop operationCharacteristic tableExcitation tableTQQnextCommentQQnextTComment000hold state000No change011hold state110No change101toggle011Complement110toggle101Complement2021/9/1212电子技术专业英语教程Trigger flip-flops(T flip-flops)Figure 20-2 shows T-type flip-flop.When T is held high,the trigg
18、er flip-flop divides the clock frequency by two;that is,if clock frequency is 4 MHz,the output frequency obtained from the flip-flop will be 2 MHz.This divide by feature has application in various types of digital counters.A T flip-flop can also be built using a JK flip-flop(J&K pins are connected t
19、ogether and act as T)or D flip-flop(T input and Qprevious is connected to the D input through an XOR gate).Figure 20-2 T-type flip-flop 2021/9/1213电子技术专业英语教程JK flip-flopThe JK flip-flop augments the behavior of the SR flip-flop(J=Set,K=Reset)by interpreting the S=R=1 condition as a flip or toggle co
20、mmand.Specifically,the combination J=1,K=0 is a command to set the flip-flop;the combination J=0,K=1 is a command to reset the flip-flop;and the combination J=K=1 is a command to toggle the flip-flop,i.e.,change its output to the logical complement of its current value.Setting J=K=0 does NOT result
21、in a D flip-flop,but rather,will hold the current state.To synthesize a D flip-flop,simply set K equal to the complement of J.The JK flip-flop is therefore a universal flip-flop,because it can be configured to work as an SR flip-flop,a D flip-flop,or a T flip-flop.NOTE:The flip flop is positive edge
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