RIID硬件原理及其实现.ppt

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1、RFID硬件原理简介硬件原理简介 以以AS3990阅读器芯片为例阅读器芯片为例u涉及的一些基础概念uRFID硬件结构及各部分作用uAS3990阅读器芯片介绍阅读器芯片介绍n基带：指信号的频谱从零频率附近开始。n频带：指信号的频谱具有带通形式且中心频率远离零频。携带有消息；适合在信道中传输。ASK调制和调制和PSK调制调制PSKASK信号波形(OOK)n nRFIDRFID使用的使用的ASKASK信号的调制度是信号的调制度是8080100%100%。ASK解调解调非相干解调（包络检波法）非相干解调（包络检波法）相干解调相干解调PLL(锁相环)混频（器件的非线性）(光的颜色)RFID中发射机混频结

2、构n n低中频n n超外差n n零中频中频选为0（本振与载波同频）时的超外差结构。GEN2协议EPC physical layerEPC physical layerInterrogator!tagInterrogator!tag:Carrier:860-960Mhz(depending on local regulations)Carrier:860-960Mhz(depending on local regulations)EU:865.5-867.6Mhz,US:902-928Mhz,divided into channels EU:865.5-867.6Mhz,US:902-928Mh

3、z,divided into channels (200kHz,500kHz)yes,FDMA is possible!(200kHz,500kHz)yes,FDMA is possible!Modulation:ASK(DSB-ASK,SSB-ASK,PR-ASK tagModulation:ASK(DSB-ASK,SSB-ASK,PR-ASK tag undestandsundestands all)all)Encoding:PIE Encoding:PIE Bandwidth:26.7-128kbit/s Bandwidth:26.7-128kbit/sTag!interrogatorT

4、ag!interrogator:Modulation:ASK or PSK(reader understands all)Modulation:ASK or PSK(reader understands all)Encoding:reader decides Encoding:reader decides FM0 FM0 basebandbaseband(40-640kbit/s)(40-640kbit/s)Miller of a Miller of a subcarriersubcarrier(5-320kbit/s)(5-320kbit/s)Data rate depends on Div

5、ide Ratio and Data rate depends on Divide Ratio and TRcalTRcal,selected by,selected by reader QUERY command reader QUERY commandRFID系统工作原理系统工作原理1.读写器开始工作之后，先内向空间发送860960 MHz频率范围的载波，激活标签。2.标签从射频信号获得能量后，响应读写器发送的指令。3.读写器开始发送带调制的命令信息，标签从载有信息的调制信号获取能量的同时得到指令，标签依照指令做出响应。相互认证通过之后，阅读器会向电子标签发出读、写、锁定、kill、盘存等

6、操作指令。阅读器发射未调载波信号作用阅读器发射未调载波信号作用n为标签供电；n为标签反向散射信号提供载；n为零中频接收机提供本振。电磁反向散射电磁反向散射阅读器发出的射频信号传播标签的天线上，标签需要向将阅读器发送信息时，就通过调整天线的复阻抗，改变天线对电磁波的反射系数，从而对反射波进行相位或振幅的调制。一种反射调制的电路实现一种反射调制的电路实现RFID系统工作波形系统工作波形RFID读写器硬件组成读写器硬件组成AS3990/AS3991芯片简介芯片简介n n各部分硬件结构n n各部分功能、工作原理n n只涉及少芯片引脚n n各部分相关寄存器设置单独由word文档列出Comprise of

7、lanalog and digital functionality with complete EPC Gen2 or ISO18000-6C digital protocol support.lon-board PLL section with integrated VCOlsupply sectionlDAC and ADC sectionlHost interface sectionlConfiguration registers(configures operation of all blocks)Power up and operationslNeeds to be correctl

8、y supplied via.VEXT and VEXT2 pins and enabled via.EN pin At power-up.lThe configuration registers are preset to a default operation mode.lAccess and change registers(P23)to choose other options.lCommunicationCommunicationlThe communication between the reader and the transponder follows the reader t

9、alk first method.lAfter power-up and configuring IC,the host system starts communication by turning on the RF field by setting option bit rf_on。Transmitting and receiving modesNormal Data Mode:the TX and RX data is transferred through the FIFO register and all protocol data processing is done intern

10、ally.Direct Data Mode:the data processing is done by the host system.接口总线(interface bus)lparallel 10-pin buslcan be configured and used as a serial peripheral interface(SPI)lexclusive,can not switch between them in a single application.l The parallel mode is selected if all IO pins are low during lo

11、w to high transition of the EN pin(enable).The reader will always behave as the“slave”connected to the host system(MCU),which behaves as the“master”device.The host system initiates all communications.The reader has an IRQ pin to ask for host system attention.Communication is initialized by a Start c

12、ondition,which should be followed by an Address or Command word.The Address and Command words are 8-bits long.Communication is closed by an appropriate stop condition.命令/地址格式lContinuous address modelnoncontinuous address modelcommand mode.Continuous address mode needs to be closed by StopCont condit

13、ion while the other two modes need to be terminated by StopSgl munication modesContinuous address modelCont mode=1,the first data that follows the address is written(or read)to(from)the given address.For each additional data,the address is incremented by one.lcan be used to write part of the control

14、 registers in a single stream without changing the address.组合模式Registers 12,14,15,16,and 17 are three bytes deep.They can be accessed by Continuous address mode only.The least significant byte is accessed first.It is possible to access only deep register in a single communication stream。The 24 bytes

15、 deep FIFO register can be accessed by Continuous address mode only.)It is allowed to use communication stream combined of command mode and address mode.Example:Reset FIFO,Transmit,write to 1D,1E for transmission length,and continuously to 1F for filling FIFO with transmission data.Start=start condi

16、tionAdr=address with Cont bit lowAdrc=address with the Cont bit highCmd=command byteData=data byteStopSgl=stop condition for termination of the command or non-continuous address modeStopCont=stop condition for termination of the continuous address model命令后可以是地址，可以是命令，但不可以是数据。l地址后只能是数据。地址和命令是定义的，数据是随

17、机的。这样可以保证不会混淆并行接口（以StopSgl结尾）VDD_I0此引脚很重要，定义了芯片与MCU的通信电平(1.8-5.5v)。如果使用芯片内部高压器供电(VDD_D)，则应将VDD_IO与VDD_D相连。如果MCU单独供电，则应调节相关设置寄存器。SUPPLYA set of 3.4V regulators is used for supplying the reference block,AD and DA converters,low frequency receiver cells,the RF part,and digital part.It is possible to us

18、e the digital part supply VDD_D for supplying the external MCU with a current consumption up to 20mA.An additional 4.8V regulator is used for the input RF mixers supply.The input of this regulator is VEXT,output is VDD_MIX pin.The VEXT voltage needs to be between 5.3V and 5.5V.Power Down Mode:EN pin

19、 low(EN=L).the OAD2 pin not be connected.Normal Mode:EN=H.The chip is ready to move to transmit or receive operation.Standby Mode:stby=H.In the standby mode the regulators,reference voltage system,and crystal oscillator are operating in low power mode;but the PLL,transmitter output stages and receiv

20、er are switched off.PLLcomposed of a voltage control oscillator(VCO),prescaler,main and reference divider,phasefrequency detector,charge pump,and loop filter.All building blocks excluding the loop filter are completely integrated.external RF source can be used.It is also possible to use external VCO

21、 and internal PLL circuitry.(使用于对相位噪声要求较高的场合)每次启动RF模块之前，主机都要先对PLL模块各项参数进行设置（主要是预定标）。跳频(Frequency hopping)：主机以命令形式控制。（相关命令参考手册）。lprotocol processing digital partlshapinglModulatorlamplifier circuitry.发射机(TRANSMITTER)三种工作模式lNormal Mode(正常模式)lDirect Mode Using Parrallele InterfacelDirect Mode using Ser

22、ial interface(SPI)Normal ModeIn normal mode,all signal processing(protocol coding,adding preamble or frame-sync and CRC,signal shaping,and modulation)is done internally.Frame-sync:帧同步。The transmission is started by sending the transmit command followed by information on the number of bytes that shou

23、ld be transmitted and the data.The number of bytes needs to be written in the TX length registers and the data to the FIFO register.The transmission actually starts when the first data byte is written into the FIFO.The second possibility is to start transmission with one of the direct Gen2 commands(

24、Query,QueryRep,QueryAdjust,ACK,NAK,ReqRN).In this case,the transmission is started after receiving the command.The reader chip starts transmission and sends an interrupt request when only 3 bytes are left in the FIFO.When interrupt is received,the host system needs to read the IRQ status register(0C

25、).(Read-Clear)At the end of the transmit operation,the external system is notified by another interrupt request with a flag in the IRQ register that signals the end of transmission.interruptModulatorNormal data mode Internally coded and internally shaped.Externally coded and internally shaped modula

26、tion.(直接模式)Externally coded and externally shaped modulation.（可以为外部提供所需参考信息）可以实现DSB-ASK and PR-ASK 调制。实现机制是内部有两D/A转换器，第一个定义座号高电平，第二个定义信号低电平。这两个电平也用作整形电路的参考电平。Receiver混频器(INPUT MIXER)RX滤波器(RX Filter)RX增益(RX Gain)RSSI(Received Signal Strength Indicator)回波信号电平指示(Reflected RF Level Indicator.(电路泄露或环境影响)RX GAINManual Adjustment(手动调整手动调整)AGC(自动增益控制自动增益控制)AGL(自动电平控制自动电平控制)限于时间、篇幅，不能详细介绍各部分功能，及具体电路结构，如果有兴趣，欢迎一起探讨，共同进步。