Lesson24Memory电子技术专业英语教程.ppt
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1、Unit10 Computer Program Design Lesson 24 Memory电子技术专业英语教程冯新宇主编电子工业出版社电子工业出版社1/28/20231Lesson 24 MemoryBackgroundsText tourLanguage in useVocabulary Structure Reading/writing techniques1/28/20232TerminologyRAM随机存储器DRAM动态随机存储器DDR(DoubleDataRate)双倍数据数率prefetching预取指令,预取数doubletransitionclocking双倍传输时钟DI
2、MM双直列内存模块;双线内存模块operatingsystem操作系统peakbandwidth峰值带宽Backgrounds1/28/20233Text tour Outline-Introduction-DDR1-DDR2-DDR31/28/20234IntroductionProcessors use system memory to temporarily store the operatingsystem,mission-critical applications,and the data they use andmanipulate.Therefore,the performanc
3、e of the applications andreliabilityofthedataareintrinsicallytiedtothespeedandbandwidthofthesystemmemory.Over the years,these factors have driven the evolution of systemmemoryfromasynchronousDRAMtechnologies,suchasFastPageMode(FPM)memoryandExtendedDataOutput(EDO)memory,tohigh-bandwidthsynchronousDRA
4、M(SDRAM)technologies.Yet,systemmemorybandwidthhasnotkeptpacewithimprovementsin processor performance,thus creating a“performance gap”.Processor performance,which is often equated to the number oftransistorsinachip,doubleseverycoupleofyears.Ontheotherhand,memorybandwidthdoublesroughlyeverythreeyears.
5、Therefore,ifprocessorandmemoryperformancecontinuetoincreaseattheserates,theperformancegapbetweenthemwillwiden.1/28/20235IntroductionWhyistheprocessor-memoryperformancegapimportant?Theprocessorisforcedtoidlewhileitwaitsfordatafromsystemmemory.Thus,theperformancegappreventsmanyapplicationsfromeffectiv
6、elyusingthefullcomputingpowerofmodernprocessors.Inanattempttonarrowtheperformancegap,theindustryvigorouslypursuesthedevelopmentofnewmemorytechnologies.HPworkswithJointElectronicDeviceEngineeringCouncil(JEDEC)memoryvendorsandchipsetdevelopersduringmemorytechnologydevelopment to ensure that new memory
7、 products fulfill customerneedsinregardstoreliability,cost,andbackwardcompatibility.1/28/20236DDR1TodevelopthefirstgenerationofDDRSDRAM(DDR-1),designersmadeenhancementstotheSDRAMcoretoincreasethedatarate.Theseenhancementsincludeprefetching,doubletransitionclocking,strobe-baseddatabus,andSSTL1_2lowvo
8、ltagesignaling.At400MHz,DDRincreasesmemorybandwidthto3.2GB/s,thisis400percentmorethanoriginalSDRAM.1/28/20237DDR1InSDRAM,onebitperclockcycleistransferredfromthememorycellarraytotheinput/output(I/O)bufferordataqueue(DQ).TheI/Obufferreleasesonebittothebusperpinandclockcycle(ontherisingedgeoftheclocksi
9、gnal).Todoublethedatarate,DDRSDRAMusesatechniquecalledprefetchingtotransfertwobitsfromthememorycellarraytotheI/Obufferintwoseparatepipelines.ThentheI/Obufferreleasesthebitsintheorderofthequeueonthesameoutputline.Thisisknownas2n-prefetcharchitecturebecausethetwodatabitsarefetchedfromthememorycellarra
10、ybeforetheyarereleasedtothebusinatimemultiplexedmanner.1/28/20238DDR1StandardDRAMtransfersonedatabittothebusontherisingedgeofthebusclocksignal,whileDDR-1usesboththerisingandfallingedgesoftheclocktotriggerthedatatransfertothebus.Thistechnique,knownasdoubletransitionclocking,deliverstwicethebandwidtho
11、fSDRAMwithoutincreasingtheclockfrequency.DDR-1hastheoreticalpeakdatatransferratesof1.6and2.1GB/satclockfrequenciesof100MHzand133MHz,respectively.1/28/20239AnotherdifferencebetweenSDRAMandDDR-1isthesignalingtechnology.Insteadofusinga3.3Voperatingvoltage,DDR-1usesa2.5VsignalingspecificationknownasStub
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