主机板介绍.ppt

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1、www.q-Motherboard FunctionalAwww.q-Mother Board Overview www.q-CPU810EICH0CPU BUSHUB LINK BUSPCI BUSFWH4MbytesDisplay CacheDIMMLPCSuper I/OMotherboard Block Diagram(Intel 810)PCI www.q-IntelICHFunction DescriptionCD-ROMCDRWZIPDVDAC97AD1881USBwww.q-LPCSuper I/OSerial PortsFunction Dwww.q-Function Des

2、cription CPUOptimized for Intel Pentium II/III and Celeron Processor66/100/133 MHz System Bus FrequencyMemory100 MHz System Memory Bus Frequency(PC100 Only)Two DIMM Sockets DesignedSupports up to 512MB System MemoryVideoIntegrated by 810ESupports 4 MB Display Cache memoryUp to 1600 x1200 in 8-bit co

3、lor at 85 Hz www.q-Function Description IDESupports Ultra ATA/66 Mode(66 Mbytes/sec)Supports PIO Mode 4 Transfers up to 14 Mbytes/sec Independent Timing of Up to 4 DrivesUSBUSB Revision 1.1 CompliantTransfer Rate 12 MBits/secSupports 2 PortsAC97 AudioAC97 CompliantBuild in AD1881 AC97 CODECwww.q-Fun

4、ction Description PCISupports PCI at 33 MHzSupport Four SlotsSupports PCI Rev 2.2 Swww.q-CPU Celeron processor The Intel Celeron processor is designed for uni-processor based Value PC desktops and is binary compatible with previous generation Intel architecture processors.The Intel Celeron processor

5、 provides good performance for applications running on advanced operating systemssuch as Windows 95/98,Windows NT,and UNIXwww.q- Optimized for 32-bit applications running on advanced 32-bit operating systems.External Frequency 66 MHz Internal Frequency 700 MHz,667 MHz,633 MHz,600 MHz,566 MHz,533 MHz

6、,533A MHz,500 MHz,466 MHz,433 MHz,400 MHz,366 MHz 333 MHzCeleron processor Specification www.q-Integrated high performance 32 KB instruction and data,level-one cache:separate 16 KB instruction and 16 KB data caches.Level 2 Cache 128 KB 4 GB of cacheable memory space.Integrated thermal diode.Celeron

7、processor Specification www.q-Celeron processor Specification Power Cwww.q- Uses cost-effective packaging technology.-Single Edge Processor(S.E.P.)Package to maintain compatibility with SC242 (processor core frequencies(MHz):266,300,300A,333,366,400,433).-Plastic Pin Grid Array(PPGA)Package (process

8、or core frequencies(MHz):300A,333,366,400,433,466,500,533).-Flip-Chip Pin Grid Array(FC-PGA)Package (processor core frequencies(MHz):533A,566,600,633,667,700)Celeron processor Specification www.q-DIMM Module Specification PC66-,PC100-and PC133-compliant JEDEC-standard 168-pin,dual in-line memory mod

9、ule(DIMM)Utilizes 100 MHz,125 MHz and 133 MHz SDRAM components Unbuttered 64MB(8 Meg x 64)and 128MB(16 Meg x 64)Single+3.3V?.3V power supply Fully synchronous;all signals registered on positive edge of system clock Frequency/CAS Latency133 MHz/CL=2(7.5,133MHz SDRAMs)133 MHz/CL=3(7.5ns,133 MHz SDRAMs

10、)100 MHz/CL=2(8ns,125 MHz SDRAMs)66 MHz/CL=2(10ns,100 MHz SDRAMs)www.q-DIMM Module Specification SERIAL PRESENCE-DETECT OPERATION These modules incorporate serial presence-detect(SPD).The SPD function is implemented using a 2,048-bit EEPROM.This nonvolatile storage device contains 256 bytes.The firs

11、t 128 bytes can be programmed by DIMM module vender to identify the module type and various SDRAM organizations and timing parameters.The remaining 128 bytes of storage are available for use by the cus-tomer.System READ/WRITE operations between the master(system logic)and the slave EEPROM device(DIM

12、M)occur via a standard IIC bus using the DIMM SCL(clock)and SDA(data)signals,together with SA(2:0),which provide eight unique DIMM/EEPROM www.q-DIMM Module Functional Block Diagram www.q-AC97 Link for Audio and Telephony CODECs AC97 Link for Audio and Telephony CODECs AC97 2.1 Compliant Independent

13、Bus Master Logic for PCM In,PCM Out,Mic Input,Modem In,Modem Out Separate Independent PCI Functions for Audio and Modem Supports wake-up eventsIntel82801AMR SlotACCODECMCCODECwww.q-USB-Universal Serial Bus Goals for the Universal Serial Bus Ease-of-use for PC peripheral expansion Low-cost solution t

14、hat supports transfer rates up to 12Mb/s Full support for real-time data for voice,audio,and compressed video Comprehension of various PC configurations and form factors Provision of a standard interface capable of quick diffusion into www.q-USB-Universal Serial Bus www.q-USB-Universal Serial Bus Co

15、nnection model between USB devices and the host.Connection devices up to www.q-USB-Universal Serial Bus Multiple USB Host/Device Vwww.q- The USB full-speed signaling bit rate is 12Mb/s.A limited capability low-speed signaling mode is also defined at 1.5Mb/s.Bus-Powered Hubs Draws all power from USB

16、connector power pins Self-Powered Hubs:Internal function and downstream port power does not come from USB.Low Powered Function:1 Unit Load=100mA High Powered Function:5 Unit Loads=500mA USB Switch Application:The Host and all Self-powered hubs must implement over-current protection.They must detect

17、the over current condition and report it to the USB Host Controller.The controller will then remove power to that port.USB-Universal Serial Bus www.q- Signal integrity using differential drivers,receivers,and shieldingUSB-Universal Serial Bus www.q-IDE-Ultra DMA33/66 Cabling Length of Cable:Each IDE

18、 cable should be equal to or less than 18 inches.Capacitance:Less than 30 pF.Placement:A maximum of 6 inches between drive connectors on the cable.If a single drive isplaced on the cable it should be placed at the end of the cable.If a second drive is placed on thesame cable it should be placed on the next closest connector to the end of the cable(6”awayfrom the end of the cable).Grounding:Provide a direct low impedance chassis path between the motherboard groundand hard disk drives.