电气工程及其自动化专业_外文文献_英文文献_外文翻译_plc方面.pdf
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1、 1、外文原文 A:Fundamentals of Single-chip Microcomputer Th e si ng le-c hi p mic ro co mput er i s t he c ul mi na ti on of both t h e de ve lo pmen t o f t he d ig it al co mpu te r an d th e i n te gr at ed c i rc ui t a rg ua bl y t h e to w mos t s ig ni f ic an t i nv en ti on s of t he 20th c e nt
2、 ur y 1.Th es e t ow ty pe s of ar ch it ec tu re a re fo un d i n s in gle-ch i p mi cr oc ompu te r.So me em pl oy t he spl i t pr og ra m/da ta memory o f th e Ha rv ar d ar ch it ect ure,sh own in Fi g.3-5A-1,o th ers fo ll ow t he ph il os op hy,wi del y a da pt ed f or ge ner al-pur po se co m
3、pu te rs a nd mi cr op ro ce ss or s,o f maki ng n o log i ca l di st in ct ion be tw ee n pr og ra m an d d at a memory a s i n t he P r in ce to n ar ch ite c tu re,sh own i n F ig.3-5 A-2.In g en er al te r ms a s in gl e-chi p m ic ro co mput er i s c h ar ac te ri ze d by t he i nc or po ra ti
4、on of a ll t he un it s of a co mputer i n to a s in gl e d ev i ce,as s ho wn in Fi g3-5A-3.Program memory Input&CPU Output unit Data memory Fig.3-5A-1 A Harvard type Input&CPU Output unit Fig.3-5A-2.A conventional Princeton computer External System Timer/Timing clock Counter components Serial I/O
5、Reset Interrupts Power ROM Prarallel I/O RAM CPU Fig3-5A-3.Principal features of a microcomputer Read only memory(ROM).R OMi s us ua ll y f or th e p erm an ent,no n-vo la ti le s tor age o f an a pp lic ati on s pr og ra m.Man y mi cr oc ompu te rs an d m ar e in te nd e d f or hi gh-v ol ume a ppl
6、 ic at ions an d he nc e t he eco nomic al m an uf act ure o f th e de vic es re qu ir es t h at t he co nt en t s of t he pr og ra m memor y b e co mmit t ed pe rm ane ntly du ri ng t he m an ufa c tu re o f ch ip s.Cl ea rl y,t hi s i mpl ie s a r i go ro us a pp ro ach to R OMc od e de ve l op me
7、nt s in ce ch ang es c an not be mad e af te r manu f ac tu re.Th is d ev elo pmen t pr oc ess ma y in vo lv e emul at io n us in g a so ph is ti ca te d d eve lo pmen t sy ste m w it h a ha rd ware e mula tio n c ap ab il it y as wel l as t he u se o f po werf ul s o ft ware t oo ls.Some m an uf ac
8、t ure rs p ro vi de ad d it io na l ROM opt i on s by i n cl ud in g i n th eir r ange d ev ic es wi t h(or i nt en de d f or u se wit h)us er p ro gr ammable memory.Th e sim ple st o f th es e i s u su al ly de vi ce w hi ch c an o per at e in a mi cro pro ce ss or mod e b y u si ng s ome of t he i
9、 np ut/o utp ut li ne s as a n a ddr es s an d da ta b us f or ac ce ss in g ex te rna l m emor y.T hi s t y pe o f de vi ce ca n b eh av e 2 f u nc ti on al ly a s t he si ng le ch ip mi cr oc ompu te r fro m w hi ch it is de ri ve d al be it wi t h re st ri ct ed I/O a nd a m od if ied ex te rn al
10、 c i rc ui t.Th e u se o f th es e dev ic es i s c ommon e ve n i n pr od uc ti on c i rc ui ts wh er e t he vo lu me do es no t j us ti f y t h e dev el opmen t costs of c us to m o n-ch i p ROM2;t he re c a n s ti ll be a s ig nif i ca nt sa ving i n I/O an d o th er c hip s c ompa re d t o a co n
11、v en ti on al mi c ro pr oc es sor ba se d ci rc ui t.Mo r e ex ac t re pl ace men t fo r ROM dev i ce s ca n be ob ta in ed i n th e f orm o f va ri an ts wit h p ig gy-b ack EPROM(Er as ab le pr o gr ammabl e RO M)s oc ke ts o r d ev ic e s wi th EP ROM i n st ea d of ROM。Th es e d ev ic es are na
12、 tu ra ll y more ex pen si ve th an eq ui va le nt R OMde v ic e,b ut d o pro v id e co mple te ci r cu it eq ui va le nt s.E PROM b as ed de vi ce s a r e al so ex tr emel y a tt ra ct ive f o r lo w-vo lu me ap p li ca ti on s wh ere th ey pr ov id e th e a dv an ta ges of a si ng le-c hi p d evi
13、ce,i n te rm s o f on-c hi p I/O,et c.,wi th t he c o nv en ie nc e of fl exi bl e us er p rog r ammabi li ty.Random access memory(RAM).RAM i s fo r th e st or ag e o f wo rk ing v a ri ab le s an d d at a u se d d ur in g pr ogr am e xe cu ti on.Th e s iz e of t h is m emor y va rie s w it h de vi
14、ce ty pe bu t it h as th e s ame c h ar ac te ri st ic wi dth (4,8,16 b its et c.)as t he pr oc es so r,S pe cia l f un ct io n re gi st e rs,su ch a s s tac k p oi nt er o r t i mer re gi st er ar e o ft en l og ic all y i nc or po ra te d i n to t he R AM ar ea.It is al so c ommon i n H ar ard ty
15、pe mi cr oc ompu t er s to tr ea t t h e RA M a re a as a co ll ec ti on of r egi st er;it is u nne ce ss ar y to ma ke d is ti nc ti on b et ween RA M a nd p r oc es so r re gi ste r a s i s d on e i n t he ca se of a mi cr op ro ce ss or sy s te m si nc e R AM a nd re gi st er s ar e no t us ua ll
16、 y p hys ic al ly s ep ara t ed i n a mi cr oco mpu te r.Central processing unit(CPU).The C PU is mu ch l i ke th at of a ny mi cr op ro ce s so r.Man y a pp li c at io ns o f mic ro c ompu te rs and mi cr oc on tr ol le rs i nv ol ve th e h and l in g of bi na ry-c o de d de ci mal(BCD)da t a(f or
17、n umeri ca l di sp lay s,fo r e xa mple),he nc e i t is c o mmon t o f in d t ha t t he CPU i s well ad ap te d t o h an dl i ng t hi s t ype of da ta.I t i s a ls o co mmon to fi nd go od fa ci li ti es f o r t es ti ng,s e tt in g and re se tt i ng in di vi du al bi t s o f memor y or I/O si nc e
18、many c o nt ro l l er ap pl ic ati on s i nv ol ve th e t ur ni n g on an d o ff of si ngle ou tp ut l in es o r t he re ad in g th e s i ng le l in e.T hes e l in es a re r e ad il y in te rf ace d t o tw o-st at e d evi ce s su ch a s s wit ch es,t h er most at s,s oli d-s ta te r el ay s,v al ve
19、s,m ot or,e t c.Parallel input/output.P ar al le l i np ut a nd o ut pu t s ch emes v a ry so mewhat i n di ff er en t mi cr oc omput er;i i s pr ov id ed t o at le as t al lo w so me fl ex ib il it pi ns ar e ou tp ut s a nd w hi ch a re in pu t s.Th is n mo st a m ec ha nism y of ch o os in g w hi
20、 ch may ap pl y to a ll or 3 s o me o f th e po rts.S ome I/O li nes ar e su it ab le fo r d ir ec t i n te rf ac in g to,f or ex ampl e,f luo r es ce nt d is pl ays,o r ca n pr ov id e su ff ic ien t c ur re nt to make in te rf ac in g o the r c ompo ne nt s s t ra ig ht fo rw ar d.Some dev ic es a
21、l lo w an I/O po rt to be c on f ig ur ed as a sy st em b us to a ll ow o ff-c hi p me mory an d I/O exp ans io n.Th is f a ci li ty i s po ten t ia ll y us ef ul as a pr od uc t ra nge de ve lo ps,s i nc e su cc es si ve enh an ce ment s may be co me t oo b ig f or o n-ch ip me mory a nd i t is und
22、 es ir ab le n ot t o bu il d on t he e xi st in g s o ft ware b as e.Serial input/output .S er i al co mmuni ca ti on wi th t erminal de vi ce s i s co mmon me an s of p ro vi din g a li nk u si ng a sm al l nu mber of l in es.T hi s so r t of co mmun ic at i on c an al so be e xp lo it ed fo r i n
23、 te rf ac in g sp eci al fu nc ti on c hip s o r li nk in g sev e ra l mi cr oc ompu te rs to get he r.B ot h the co mmon a sy nc hro n ou s s y nc hr on ou s co mmunic at io n sc he mes re qu ir e pr ot oco l s th at pr ov id e fr amin g(s ta rt a nd s to p)i nf or mati on.Thi s c an b e i mpl emen
24、 te d as a har dwar e fa ci lit y o r U(S)ART(Univ er sal(sy nc hr on ou s)as y nc hr on ou s r e ce iv er/t ra ns mit t er)re li ev in g t he pr oc es so r(an d t he ap pl ic at io ns p rog r ammer)o f th is l ow-l ev el,ti me-c on su mi ng,de ta il.t is m ere l y ne ce ss ar y to s el ec te d a ba
25、 ud-r at e an d po ss ib ly o th er op t io ns(nu mber of st op bi ts,p ari t y,e tc.)and l o ad(or re ad fr om)t he se ri al tr an s mi tt er(o r re c ei v er)b uf fer.Se ri al iz at io n of t he d at a in t he app ro pr ia te f orm at is t he n ha nd le d by t he ha r dwar e ci rc ui t.Timing/coun
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