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1、深能级瞬态谱深能级瞬态谱(Deep Level Transient Spectroscopy)是半导体领域研究和检测半导体杂质、缺陷深能级、界面态等的重要技术手 段。根据半导体P-N 结、金-半接触结构肖特基结的瞬态电容(Ct)技术和深能级瞬态谱(DLTS)的发射率窗技术测量出的深能级瞬态谱,是一种具有很高检测灵敏度的实验 方法,能检测半导体中微量杂质、缺陷的深能级及界面态。通过对样品的温度扫描,可以给出表征半导体禁带范围内的杂质、缺陷深能级及界面态随温度(即能量) 分布的DLTS 谱。DLS-83D集成多种全自动的测量模式及全面的数据分析,可以确定杂质的类型、含量以及随深度的分布,也可用于光
2、伏太阳能电池领域中,分析少子寿命和转化效率衰减的关键性杂质元素和杂质元素的晶格占位,确定是何种掺杂元素和何种元素占位影响少子寿命。该仪器测量界面态速度快,精度高,是生产和科研中可广为应用的测试技术。主要特点 探测灵敏度高 可直接求出界面态按能量的分布 可分别测定界面态能级和体内深能级 可分别测定俘获截面与能量、温度的关系性能指标 温度范围:20K 320K 温度稳定性:0.1K 温度精度: 1K或 1% 测试电容:1 10000pF 电容灵敏度:2*10-5pF 相角稳定性:0.001 检测灵敏度:0.1sec (Boonton内置偏压) 5s to 0.1sec (数据采集卡)脉冲幅度: 到
3、 200V, slew rate 50s 采样次数: 10,000.记录分辨率: 50ns暂时分辨率, 优于 50aF 电容分辨率过滤: 全自动检测及正弦噪音消除Deep Level Transient Spectroscopy (DLTS) is a powerful tool for the study of electrically active defects (known as traps) in semiconductors, due to contamination. DLTS is a destructive technique, as it requires forming
4、either a Schottky diode or a p-n junction with a small sample, usually cut from a complete wafer. Majority carrier traps are observed by the application of a reverse bias pulse, while minority carrier traps can be observed by the application of a forward bias pulse.The technique works by observing t
5、he capacitance transient associated with the change in depletion region width as the diode returns to equilibrium from an initial non-equilibrium state. The capacitance transient is measured as a function of temperature (usually in the range from 30K to room temperature 300K or above). By using a lo
6、ck-in averaging technique, peaks at a particular emission rate are found as a function of temperature. By looking for emissions at different frequencies and monitoring the temperature of the associated peak, an Arrhenius plot allows for the deduction of a traps activation energy. By varying the puls
7、e width, it is possible to determine the capture cross section precisely.Semilabs DLTS system is composed of the DLS-83D or DLS-1000 and one of the four cryostats Semilab offers.DLS-83D 四川大学材料科学工程 37.35w 2005The DLS-83D offers a fully automatic measurement mode as well as providing complete interpre
8、tation of the measured data, including impurity identification and concentration determination without any need for user interaction.The deep level transient spectroscopy (DLTS) is the best technique for monitoring and characterizing deep levels caused by intentionally or unintentionally introduced
9、impurities and defects in semiconductor materials and complete devices. It is an extremely versatile method for determining all parameters associated with deep traps including energy level, capture cross section and concentration distribution. It permits identification of the impurities and is capab
10、le of detecting contamination concentrations below 109 atoms/cm3.Key Features: Highest sensitivity (109 atoms/cm3) for detection of trace levels of contamination Interfacing to a broad range of cryostats Wide range of measurement modes: o temperature scano frequency scano depth profilingo C-V charac
11、terizationo capture cross section measuremento optical injectiono constant capacitance feedback loopo conductance transient measurementso MOS interface state density distribution controlled by digital and analog settings to allow real ease of operation sample quality test by I-V, C-V full computer c
12、ontrol with extensive software support, complete library database for accurate contamination identificationApplications:Solutions for R&D DLTS From WikipediaDeep-level transient spectroscopyFrom Wikipedia, the free encyclopediaDeep Level Transient Spectroscopy (DLTS) is an experimental tool for stud
13、ying electrically active defects (known as charge carrier traps) in semiconductors. DLTS establishes fundamental defect parameters and measures their concentration in the material. Some of the parameters are considered as defect “finger prints” used for their identifications and analysis.DLTS invest
14、igates defects present in a space charge (depletion) region of a simple electronic device. The most commonly used are Schottky diodes or p-n junctions. In the measurement process the steady-state diode reverse polarization voltage is disturbed by a voltage pulse. This voltage pulse reduces the elect
15、ric field in the space charge region and allows free carriers from the semiconductor bulk to penetrate this region and recharge the defects causing their non-equilibrium charge state. After the pulse, when the voltage returns to its steady-state value, the defects start to emit trapped carriers due
16、to the thermal emission process. The technique observes the device space charge region capacitance where the defect charge state recovery causes the capacitance transient. The voltage pulse followed by the defect charge state recovery are cycled allowing an application of different signal processing
17、 methods for defect recharging process analysis.The DLTS technique has a higher sensitivity than almost any other semiconductor diagnostic technique. For example, in silicon it can detect impurities and defects at a concentration of one part in 1012 of the material host atoms. This feature together
18、with a technical simplicity of its design made it very popular in research labs and semiconductor material production factories.The DLTS technique was pioneered by D. V. Lang (David Vern Lang of Bell Laboratories) in 1974.1 US Patent2 was awarded to Lang in 1975.Contentshide 1 DLTS methods o 1.1 Con
19、ventional DLTSo 1.2 MCTS and minority-carrier DLTSo 1.3 Laplace DLTSo 1.4 Constant-Capacitance DLTSo 1.5 I-DLTS and PITS 2 See also 3 References 4 External linksedit DLTS methodsedit Conventional DLTSTypical conventional DLTS spectraIn conventional DLTS the capacitance transients are investigated by
20、 using a lock-in amplifier or double box-car averaging technique when the sample temperature is slowly varied (usually in a range from liquid nitrogen temperature to room temperature 300K or above). The equipment reference frequency is the voltage pulse repetition rate. In the conventional DLTS meth
21、od this frequency multiplied by some constant (depending on the hardware used) is called the “rate window”. When during the sample temperature variation the emission rate of carriers from some defect equals to the rate window one obtains in the spectrum a peak. By setting up different rate windows i
22、n subsequent DLTS spectra measurements one obtains different temperatures at which some particular peak appears. Having a set of the emission rate and corresponding temperature pairs one can make an Arrhenius plot which allows for the deduction of defect activation energy for the thermal emission pr
23、ocess. Usually this energy (sometimes called the defect energy level) together with the plot intersept value are defect parameters used for its identification or analysis.Recently, DLTS has been used to study quantum dots.345edit MCTS and minority-carrier DLTSFor the Schottky diodes, majority carrie
24、r traps are observed by the application of a reverse bias pulse, while minority carrier traps can be observed when the reverse bias voltage pulses are replaced with light pulses with the photon energy from the above semiconductor bandgap spectral range.67 This method is called Minority Carrier Trans
25、ient Spectroscopy (MCTS). The minority carrier traps can be also observed for the p-n junctions by application of forward bias pulses which inject minority carriers into the space charge region.8 In DLTS plots the minority carrier spectra usually are depicted with an opposite sign of amplitude in re
26、spect to the majority carrier trap spectra.edit Laplace DLTSTypical Laplace DLTS spectra: atom of gold in SiGe crystalsThe uniaxial-stress Laplace DLTS measurements: interstitial atom of hydrogen in siliconThere is an extension to DLTS known as a high resolution Laplace transform DLTS (LDLTS). Lapla
27、ce DLTS is an isothermal technique in which the capacitance transients are digitized and averaged at a fixed temperature. Then the defect emission rates are obtained with a use of numerical methods being equivalent to the inverse Laplace transformation. The obtained emission rates are presented as a
28、 spectral plot.910 The main advantage of Laplace DLTS in comparison to conventional DLTS is the substantial increase in energy resolution understood here as an ability to distinguish very similar signals.Laplace DLTS in combination with uniaxial stress results in a splitting of the defect energy lev
29、el. Assuming a random distribution of defects in non-equivalent orientations, the number of split lines and their intensity ratios reflect the symmetry class11 of the given defect.9Application of LDLTS to MOS capacitors needs device polarization voltages in a range where the Fermi level extrapolated
30、 from semiconductor to the semiconductor-oxide interface intersects this interface within the semiconductor bandgap range. The electronic interface states present at this interface can trap carriers similarly to defects described above. If their occupancy with electrons or holes is disturbed by a sm
31、all voltage pulse then the device capacitance recovers after the pulse to its initial value as the interface states start to emit carriers. This recovery process can be analyzed with the LDLTS method for different device polarization voltages. Such a procedure allows to obtain the energy state distr
32、ibution of the interface electronic states at the semiconductor-oxide (or dielectric) interfaces.12edit Constant-Capacitance DLTSIn general, the analysis of the capacitance transients in the DLTS measurements assumes that the concentration of investigated traps is much smaller than the material dopi
33、ng concentration. In cases when this assumption is not fulfilled then the constant capacitance DLTS (CCDLTS) method is used for more accurate determination of the trap concentration.13 When the defects recharge and their concentration is high then the width of the device space region varies making t
34、he analysis of the capacitance transient inaccurate. The additional electronic circuitry maintaining the total device capacitance constant by varying the device bias voltage helps to keep the depletion region width constant. As a result, the varying device voltage reflects the defect recharge proces
35、s. An analysis of the CCDLTS system using feedback theory was provided by Lau and Lam in 1982.14edit I-DLTS and PITSThere is an important shortcoming for DLTS: it cannot be used for insulating materials. (Note: an insulator can be considered as a very large bandgap semiconductor.) For insulating mat
36、erials it is difficult or impossible to produce a device having a space region which width could be changed by the external voltage bias and thus the capacitance measurement-based DLTS methods cannot be applied for the defect analysis. Basing on experiences of the thermally stimulated current (TSC)
37、spectroscopy, the current transients are analyzed with the DLTS methods (I-DLTS), where the light pulses are used for the defect occupancy disturbance. This method in the literature is sometimes called the Photoinduced Transient Spectroscopy (PITS).15 I-DLTS or PITS are also used for studying defect
38、s in the i-region of a p-i-n diode.edit FT 1030 http:/www.phystech.de/Specifications Pulse GeneratorVoltage Range20.4V (102V opt.)Voltage Resolution0.625mVMax. Current15mAPulse Width1s-1000sVoltage measurementRange10VSensitivity1015 Ohm (106 Ohm)Misalignment voltage compensation providedCapacitance
39、MeterHFsignal100mV 1MHz (20mVoptional)RangespF3,30,30003000 (autoormanual)Capacitance compensation0.1-3000pF (autoormanual)Sensitivity0.01fFStandard CryostatTemperature Range77K - 450KStandard CryostatTemperature Range77K - 450KTypical performanceResistance:0.1mOhm- 10GOhmwith 1 m layer thickness:Re
40、sistivity:1Ohmcm- 10MOhmcmConcentration:107-1021cm-3Signal Processing Transient Recorder Resolution 12 Bit Sampling Intervall 1.5 s - 1000 s Transient Samples 16 - 4096 Co-additions 1 - 1,000,000 Amplifier Gain 1 - 1024 Voltage Range 10 V Voltage Resolution 2.5 nV Current Range 1 A - 10 mA Current R
41、esolution 4 pA Software correlator 20 correlator functions e.g. Box-Car, Lock-in, Fourier Pulse Generator Pulsewidth range internal 1 E-6 s - 4000 s external (optional) 20 E-9 s - 100 E-6 s Pulse & DC Voltage Range -20V - 20V (optional -100V - 100V) Typical performance (Schottky Diode app. 50pF Reverse Bias Capacitance) Sensitivity 10e-7NT/(ND-NA)10E-5 Energy Accurancy HT +/- 3% Energy resolution 10 meV Emission rate range 5*10E-4sec-1en1,5E4 sec-1
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