T650HVN060 规格书.pdf

《T650HVN060 规格书.pdf》由会员分享，可在线阅读，更多相关《T650HVN060 规格书.pdf（31页珍藏版）》请在淘文阁 - 分享文档赚钱的网站上搜索。

1、 T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.Page 1/31 Model Name:T650HVN06.0 Issue Date:2012/06/14 ()Preliminary Specification()Final Specifications Customer Signature Date AUO Date Approved By _ Approval By PM Director CP Wang _ Reviewed By RD Di

2、rector Eugene Chen _ Reviewed By Project Leader TaiYu Chen _ Note Prepared By PM Fanf an Lee _ T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.Page 2/31 Contents No CONTENTS RECORD OF REVISIONS 1 GENERAL DESCRIPTION 2 ABSOLUTE MAXIMUM RATINGS 3 ELECTRI

3、CAL SPECIFICATION 3-1 ELECTRIACL CHARACTERISTICS 3-2 INTERFACE CONNECTIONS 3-3 SIGNAL TIMING SPECIFICATION 3-4 SIGNAL TIMING WAVEFORM 3-5 COLOR INPUT DATA REFERENCE 3-6 POWER SEQUENCE 3-7 BACKLIGHT SPECIFICATION 4 OPTICAL SPECIFICATION 5 MECHANICAL CHARACTERISTICS 6 RELIABILITY TEST ITEMS 7 INTERNAT

4、IONAL STANDARD 7-1 SAFETY 7-2 EMC 8 PACKING 8-1 DEFINITION OF LABEL 8-2 PACKING METHODS 8-3 PALLET AND SHIPMENT INFORMATION 9 PRECAUTION 9-1 MOUNTING PRECAUTIONS 9-2 OPERATING PRECAUTIONS 9-3 ELECTROSTATIC DISCHARGE CONTROL 9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE 9-5 STORAGE 9-6 HANDLING PRECAUTIO

5、NS FOR PROTECT FILM T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.Page 3/31 Record of Revision Version Date Page Description 0.0 2012/06/14 First release T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.

6、Page 4/31 1.General Description This specification applies to the 64.5 inch Color TFT-LCD Module T650HVN06.0.This LCD module has a TFT active matrix type liquid crystal panel 1920 x 1080 pixels,and diagonal size of 65 inch.This module supports 1920 x 1080 mode.Each pixel is divided into Red,Green an

7、d Blue sub-pixels or dots which are arranged in vertical stripes.Gray scale or the brightness of the sub-pixel color is determined with a 10-bit gray scale signal for each dot.The T650HVN06.0 has been designed to apply the 10-bit 4 channel LVDS interface method.It is intended to support displays whe

8、re high brightness,wide viewing angle,high color saturation,and high color depth are very important.*General Information Items Specification Unit Note Active Screen Size 64.53 inch Display Area 1428.48(H)x 803.52(V)mm Outline Dimension 1508.0(H)x 878.0(V)x 12.8(D)mm Driver Element a-Si TFT active ma

9、trix Display Colors 10 bit,1.07B Colors Number of Pixels 1920 x 1080 Pixel Pixel Pitch 0.744 mm Pixel Arrangement RGB vertical stripe Display Operation Mode Normally Black Surface Treatment HC,3H T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.Page 5/3

10、1 2.Absolute Maximum Ratings The followings are maximum values which,if exceeded,may cause faulty operation or damage to the unit Item Symbol Min Max Unit Conditions Logic/LCD Drive Voltage VDD-0.3 +14 Volt Note 1 Input Voltage of Signal Vin-0.3+4 Volt Note 1 Operating Temperature TOP 0+50 oC Note 2

11、 Operating Humidity HOP 10 90%RH Note 2 Storage Temperature TST-20+60 oC Note 2 Storage Humidity HST 10 90%RH Note 2 Panel Surface Temperature PST-+65 oC Note 3 Note 1:Duration:50 msec.Note 2:Maximum Wet-Bulb should be 39 and No condensation.The relative humidity must not exceed 90%non-condensing at

12、 temperatures of 40 or less.At temperatures greater than 40,the wet bulb temperature must not exceed 39.Note 3:Surface temperature is measured at 50 Dry condition T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.Page 6/31 3.Electrical Specification The

13、T650HVN06.0 requires two power inputs.One is employed to power the LCD electronics and to drive the TFT array and liquid crystal.The second input for BLU is to power LED driver.3.1 Electrical Characteristics 3.1.1:DC Characteristics Value Parameter Symbol Min.Typ.Max Unit Note LCD Power Supply Input

14、 Voltage VDD 10.8 12.0 13.2 VDC 1 Power Supply Input Current IDD-1.56 1.93 A 2 Power Consumption PC-18.72 23.16 Watt 2 Inrush Current IRUSH-7.5 A 3 Input Differential Voltage VID 200 400 600 mVDC 4 Differential Input High Threshold Voltage VTH+100-+300 4 4 Differential Input Low Threshold Voltage VT

15、L-300-100 4 4 LVDS Interface Input Common Mode Voltage VICM 1.10 1.25 1.40 VDC 4 Input High Threshold Voltage VIH(High)2.7-3.3 VDC-CMOS Interface Input Low Threshold Voltage VIL(Low)0-0.6 VDC-Backlight Power Consumption PBL-209.6 229.9 Watt-Life Time 30,000 -Hours-Note:1.The ripple voltage should be

16、 controlled under 10%of VCC 2.VDD=12.0V,Fv=120Hz,FCLK=80.74MHz,25,Test Pattern:White Pattern refer to“Section:3.3 Signal Timing Specification,Typical timing”3.Measurement condition:Rising time=400us GNDGNDGNDGNDV V V VDDDDDDDD10%90%400400400400s T650HVN06.0 Product Specification Rev.0.0 Copyright AU

17、O Optronics Corp.2012 All Rights Reserved.Page 7/31 4.VICM=1.25V VTHVTL|VID|VICMGND0V|VID|VID|LVDS-LVDS+3.1.2:AC Electrical Characteristics Value Parameter Symbol Min.Typ.Max Unit Note Input Channel Pair Skew Margin tSKEW(CP)-500-+500 ps 1 Receiver Clock:Spread Spectrum Modulation range Fclk_ss Fclk

18、-3%-Fclk+3%MHz 2 Receiver Clock:Spread Spectrum Modulation frequency Fss 30-200 KHz 2 LVDS Interface Receiver Data Input Margin Fclk=85 MHz Fclk=65 MHz tRMG -0.4-0.5 -0.4 0.5 ns 3 1.Input Channel Pair Skew Margin Note:x=0,1,2,3,4 T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp

19、.2012 All Rights Reserved.Page 8/31 2.LVDS Receiver Clock SSCG(Spread spectrum clock generator)is defined as below figures 1 1 1 1/F F F FSSSSSSSSFclkFclkFclkFclk_ _ _ _ssssssss(maxmaxmaxmax)FclkFclkFclkFclk_ _ _ _ssssssss(minminminmin)FclkFclkFclkFclk 3.Receiver Data Input Margin Rating Parameter S

20、ymbol Min Type Max Unit Note Input Clock Frequency Fclk Fclk(min)-Fclk(max)MHz T=1/Fclk Input Data Position0 tRIP1-|tRMG|0|tRMG|ns Input Data Position1 tRIP0 T/7-|tRMG|T/7 T/7+|tRMG|ns Input Data Position2 tRIP6 2T/7-|tRMG|2T/7 2T/7+|tRMG|ns Input Data Position3 tRIP5 3T/7-|tRMG|3T/7 3T/7+|tRMG|ns I

21、nput Data Position4 tRIP4 4T/7-|tRMG|4T/7 4T/7+|tRMG|ns Input Data Position5 tRIP3 5T/7-|tRMG|5T/7 5T/7+|tRMG|ns Input Data Position6 tRIP2 6T/7-|tRMG|6T/7 6T/7+|tRMG|ns Rx1Rx0Rx6Rx5Rx4Rx3Rx2Rx1Rx0Rx6Rx2Rx3tRIP1tRIP0tRIP6tRIP5tRIP4tRIP3tRIP2V V V Vdiff diff diff diff=0 0 0 0V V V V1/Fclk=TLVDS-RxInp

22、ut ClockLVDS-RxInput Data T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.Page 9/313.2 Interface Connections LCD connector:FI-RE51S-HF(Manufactured by JAE)Mating connector:FI-RE51S-HL(Manufactured by JAE)PIN Symbol Description PIN Symbol Description 1

23、VDD Power Supply,+12V DC Regulated 26 CH4_0+LVDS Channel 4,Signal 0+2 VDD Power Supply,+12V DC Regulated 27 CH4_1-LVDS Channel 4,Signal 1-3 VDD Power Supply,+12V DC Regulated 28 CH4_1+LVDS Channel 4,Signal 1+4 VDD Power Supply,+12V DC Regulated 29 CH4_2-LVDS Channel 4,Signal 2-5 VDD Power Supply,+12

24、V DC Regulated 30 CH4_2+LVDS Channel 4,Signal 2+6 GND Ground 31 GND Ground 7 GND Ground 32 CH4_CLK-LVDS Channel 4,Clock-8 GND Ground 33 CH4_CLK+LVDS Channel 4,Clock+9 GND Ground 34 GND Ground 10 CH2_0-LVDS Channel 2,Signal 0-35 CH4_3-LVDS Channel 4,Signal 3-11 CH2_0+LVDS Channel 2,Signal 0+36 CH4_3+

25、LVDS Channel 4,Signal 3+12 CH2_1-LVDS Channel 2,Signal 1-37 CH4_4-LVDS Channel 4,Signal 4-13 CH2_1+LVDS Channel 2,Signal 1+38 CH4_4+LVDS Channel 4,Signal 4+14 CH2_2-LVDS Channel 2,Signal 2-39 GND Ground 15 CH2_2+LVDS Channel 2,Signal 2+40 Reserve AUO Internal Use Only 16 GND Ground 41 Reserve AUO In

26、ternal Use Only 17 CH2_CLK-LVDS Channel 2,Clock-42 Reserve AUO Internal Use Only 18 CH2_CLK+LVDS Channel 2,Clock+43 Reserve AUO Internal Use Only 19 GND Ground 44 LD_EN L or Open:Local Dimming Disable H(3.3V):Local Dimming Enable 20 CH2_3-LVDS Channel 2,Signal 3-45 LVDS_SEL Open/High(3.3V)for NS,Low

27、(GND)for JEIDA 21 CH2_3+LVDS Channel 2,Signal 3+46 Reserve AUO Internal Use Only 22 CH2_4-LVDS Channel 2,Signal 4-47 3D_SEL 3D Function Selection Open/High(3.3V):2D,Low(GND):3D 23 CH2_4+LVDS Channel 2,Signal 4+48 BITSEL Open/High(3.3V)for 10bit,Low(GND)for 8bit 24 GND Ground 49 Reserve AUO Internal

28、Use Only 25 CH4_0-LVDS Channel 4,Signal 0-50 Reserve AUO Internal Use Only 51 Reserve AUO Internal Use Only T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.Page 10/31 LCD connector:FI-RE41S-HF(Manufactured by JAE)Mating connector:FI-RE41S-HL(Manufactur

29、ed by JAE)PIN Symbol Description PIN Symbol Description 1 VDD Power Supply,+12V DC Regulated 21 CH1_3+LVDS Channel 1,Signal 3+2 VDD Power Supply,+12V DC Regulated 22 CH1_4-LVDS Channel 1,Signal 4-3 VDD Power Supply,+12V DC Regulated 23 CH1_4+LVDS Channel 1,Signal 4+4 VDD Power Supply,+12V DC Regulat

30、ed 24 GND Ground 5 VDD Power Supply,+12V DC Regulated 25 CH3_0-LVDS Channel 3,Signal 0-6 GND Ground 26 CH3_0+LVDS Channel 3,Signal 0+7 GND Ground 27 CH3_1-LVDS Channel 3,Signal 1-8 GND Ground 28 CH3_1+LVDS Channel 3,Signal 1+9 GND Ground 29 CH3_2-LVDS Channel 3,Signal 2-10 CH1_0-LVDS Channel 1,Signa

31、l 0-30 CH3_2+LVDS Channel 3,Signal 2+11 CH1_0+LVDS Channel 1,Signal 0+31 GND Ground 12 CH1_1-LVDS Channel 1,Signal 1-32 CH3_CLK-LVDS Channel 3,Clock-13 CH1_1+LVDS Channel 1,Signal 1+33 CH3_CLK+LVDS Channel 3,Clock+14 CH1_2-LVDS Channel 1,Signal 2-34 GND Ground 15 CH1_2+LVDS Channel 1,Signal 2+35 CH3

32、_3-LVDS Channel 3,Signal 3-16 GND Ground 36 CH3_3+LVDS Channel 3,Signal 3+17 CH1_CLK-LVDS Channel 1,Clock-37 CH3_4-LVDS Channel 3,Signal 4-18 CH1_CLK+LVDS Channel 1,Clock+38 CH3_4+LVDS Channel 3,Signal 4+19 GND Ground 39 GND Ground 20 CH1_3-LVDS Channel 1,Signal 3-40 Reserve AUO Internal Use Only 41

33、 Reserve AUO Internal Use Only Note 1:All GND(ground)pins should be connected together and should also be connected to the LCDs metal frame.Note 2:All VDD(power input)pins should be connected together.Note 3:All Reserved pins should be open without voltage input.Note 4:Signal should be sent as follo

34、wing sequence:1st line:right eye,2nd line:left eye (T-con on upper side)T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.Page 11/31LVDS Option=High/Open?NS B B B B 2 2 2 2NANANANADEDEDEDEDEDEDEDEB B B B 2 2 2 2B B B B 3 3 3 3B B B B 4 4 4 4B B B B 5 5 5

35、 5NANANANAB B B B 3 3 3 3R R R R 0 0 0 0R R R R 5 5 5 5GG GG 0 0 0 0GG GG 0 0 0 0R R R R 0 0 0 0R R R R 1 1 1 1R R R R 2 2 2 2R R R R 3 3 3 3R R R R 4 4 4 4R R R R 1 1 1 1GG GG 1 1 1 1B B B B 0 0 0 0B B B B 1 1 1 1B B B B 1 1 1 1GG GG 1 1 1 1GG GG 2 2 2 2GG GG 3 3 3 3GG GG 4 4 4 4GG GG 5 5 5 5GG GG

36、2 2 2 2ClockClockClockClockCHxCHxCHxCHx_ _ _ _0 0 0 0+CHxCHxCHxCHx_ _ _ _0 0 0 0-CHxCHxCHxCHx_ _ _ _1 1 1 1+CHxCHxCHxCHx_ _ _ _1 1 1 1-CHxCHxCHxCHx_ _ _ _2 2 2 2+CHxCHxCHxCHx_ _ _ _2 2 2 2-CHxCHxCHxCHx_ _ _ _3 3 3 3+CHxCHxCHxCHx_ _ _ _3 3 3 3-CHxCHxCHxCHx_ _ _ _4 4 4 4+CHxCHxCHxCHx_ _ _ _4 4 4 4-R R

37、 R R 6 6 6 6B B B B 7 7 7 7NANANANANANANANAR R R R 6 6 6 6R R R R 7 7 7 7GG GG 6 6 6 6GG GG 7 7 7 7B B B B 6 6 6 6R R R R 7 7 7 7R R R R 8 8 8 8B B B B 9 9 9 9NANANANANANANANAR R R R 8 8 8 8R R R R 9 9 9 9GG GG 8 8 8 8GG GG 9 9 9 9B B B B 8 8 8 8R R R R 9 9 9 9Previous Cycle Current Cycle Next Cycle

38、 Previous Cycle Current Cycle Next Cycle Previous Cycle Current Cycle Next Cycle Previous Cycle Current Cycle Next Cycle Note:x=1,2,3,4 LVDS Option=Low?JEIDA B B B B 6 6 6 6NANANANADEDEDEDEDEDEDEDEB B B B 6 6 6 6B B B B 7 7 7 7B B B B 8 8 8 8B B B B 9 9 9 9NANANANAB B B B 7 7 7 7R R R R 4 4 4 4R R R

39、 R 9 9 9 9GG GG 4 4 4 4GG GG 4 4 4 4R R R R 4 4 4 4R R R R 5 5 5 5R R R R 6 6 6 6R R R R 7 7 7 7R R R R 8 8 8 8R R R R 5 5 5 5GG GG 5 5 5 5B B B B 4 4 4 4B B B B 5 5 5 5B B B B 5 5 5 5GG GG 5 5 5 5GG GG 6 6 6 6GG GG 7 7 7 7GG GG 8 8 8 8GG GG 9 9 9 9GG GG 6 6 6 6ClockClockClockClockR R R R 2 2 2 2B B

40、 B B 3 3 3 3NANANANANANANANAR R R R 2 2 2 2R R R R 3 3 3 3GG GG 2 2 2 2GG GG 3 3 3 3B B B B 2 2 2 2R R R R 3 3 3 3CHxCHxCHxCHx_ _ _ _0 0 0 0+CHxCHxCHxCHx_ _ _ _0 0 0 0-CHxCHxCHxCHx_ _ _ _1 1 1 1+CHxCHxCHxCHx_ _ _ _1 1 1 1-CHxCHxCHxCHx_ _ _ _2 2 2 2+CHxCHxCHxCHx_ _ _ _2 2 2 2-CHxCHxCHxCHx_ _ _ _3 3 3

41、 3+CHxCHxCHxCHx_ _ _ _3 3 3 3-CHxCHxCHxCHx_ _ _ _4 4 4 4+CHxCHxCHxCHx_ _ _ _4 4 4 4-R R R R 0 0 0 0B B B B 1 1 1 1NANANANANANANANAR R R R 0 0 0 0R R R R 1 1 1 1GG GG 0 0 0 0GG GG 1 1 1 1B B B B 0 0 0 0R R R R 1 1 1 1Previous Cycle Current Cycle Next Cycle Previous Cycle Current Cycle Next Cycle Prev

42、ious Cycle Current Cycle Next Cycle Previous Cycle Current Cycle Next Cycle Note:x=1,2,3,4 T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.Page 12/313.3 Signal Timing Specification This is the signal timing required at the input of the user connector.A

43、ll of the interface signal timing should be satisfied with the following specifications for its proper operation.Signal Item Symbol Min.Typ.Max Unit Period Tv 1096 1130 1392 Th Active Tdisp(v)1080 Th Vertical Section Blanking Tblk(v)16 50 312 Th Period Th 540 570 580 Tclk Active Tdisp(h)480 Tclk Hor

44、izontal Section Blanking Tblk(h)60 90 100 Tclk Clock Frequency Fclk=1/Tclk 64.8 77.29 80.74 MHz Vertical Frequency Frequency Fv 94 120 122 Hz Horizontal Frequency Frequency Fh 120 135.6 139.2 KHz Notes:(1)Display position is specific by the rise of DE signal only.Horizontal display position is speci

45、fied by the rising edge of 1st DCLK after the rise of 1st DE,is displayed on the left edge of the screen.(2)Vertical display position is specified by the rise of DE after a“Low”level period equivalent to eight times of horizontal period.The 1st data corresponding to one horizontal line after the ris

46、e of 1st DE is displayed at the top line of screen.(3)If a period of DE“High”is less than 1920 DCLK or less than 1080 lines,the rest of the screen displays black.(4)The display position does not fit to the screen if a period of DE“High”and the effective data period do not synchronize with each other

47、.T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.Page 13/313.4 Signal Timing Waveforms ThTdisp(v)Tblk(v)TvDERGB DataLineNInvalid DataInvalid DataLine1Line2Line3LineNLine4TclkCLKDECH1CH2Pixel M-15Pixel M-11Pixel M-7Pixel M-3Pixel M-14Pixel M-10Pixel M-6

48、Pixel M-2Invalid DataInvalid DataPixel 1Pixel 2Pixel 5Pixel 9Pixel 6Pixel 10Pixel 13Pixel 14Pixel 17Pixel 18Pixel 21Pixel 22Pixel M-11Pixel M-7Pixel M-3Pixel M-10Pixel M-6Pixel M-2Invalid DataInvalid DataPixel 1Pixel 2Pixel 5Pixel 6ThTdisp(h)Tblk(h)CH3CH4Pixel M-13Pixel M-9Pixel M-5Pixel M-1Pixel M-

49、12Pixel M-8Pixel M-4Pixel MInvalid DataInvalid DataPixel 3Pixel 4Pixel 7Pixel 11Pixel 8Pixel 12Pixel 15Pixel 16Pixel 19Pixel 20Pixel 23Pixel 24Pixel M-9Pixel M-5Pixel M-1Pixel M-8Pixel M-4Pixel MInvalid DataInvalid DataPixel 3Pixel 4Pixel 7Pixel 8MMMM p p p pi i i ix x x xe e e el l l lN LineN LineN

50、 LineN Line T650HVN06.0 Product Specification Rev.0.0 Copyright AUO Optronics Corp.2012 All Rights Reserved.Page 14/313.5 Color Input Data Reference The brightness of each primary color(red,green and blue)is based on the 10 bit gray scale data input for the color;the higher the binary input,the brig