触摸控制芯片ADS7843英文.pdf

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1、FEATURESG 4-WIRE TOUCH SCREEN INTERFACEG RATIOMETRIC CONVERSIONG SINGLE SUPPLY:2.7V to 5VG UP TO 125kHz CONVERSION RATEG SERIAL INTERFACEG PROGRAMMABLE 8-OR 12-BIT RESOLUTIONG 2 AUXILIARY ANALOG INPUTSG FULL POWER-DOWN CONTROLDESCRIPTIONThe ADS7843 is a 12-bit sampling Analog-to-Digital Con-verter(A

2、DC)with a synchronous serial interface and low on-resistance switches for driving touch screens.Typical powerdissipation is 750W at a 125kHz throughput rate and a+2.7V supply.The reference voltage(VREF)can be variedbetween 1V and+VCC,providing a corresponding inputvoltage range of 0V to VREF.The dev

3、ice includes a shutdownmode which reduces typical power dissipation to under0.5W.The ADS7843 is specified down to 2.7V operation.Low power,high speed,and onboard switches make theADS7843 ideal for battery-operated systems such as per-sonal digital assistants with resistive touch screens and otherpor

4、table equipment.The ADS7843 is available in anSSOP-16 package and is specified over the 40C to+85Ctemperature range.APPLICATIONSG PERSONAL DIGITAL ASSISTANTSG PORTABLE INSTRUMENTSG POINT-OF-SALES TERMINALSG PAGERSG TOUCH SCREEN MONITORSTOUCH SCREEN CONTROLLERCDACSARComparatorFourChannelMultiplexerSe

5、rialInterfaceandControlCSDINDOUTBUSYDCLKX+PENIRQXY+YIN3IN4VREF+VCCADS7843SBAS090B SEPTEMBER 2000 REVISED MAY PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty.Production processing does not necessarily

6、 includetesting of all parameters.Copyright 2001,Texas Instruments IncorporatedPlease be aware that an important notice concerning availability,standard warranty,and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

7、US Patent No.6246394ADS78432SBAS090BPINNAMEDESCRIPTION1+VCCPower Supply,2.7V to 5V.2X+X+Position Input.ADC input Channel 1.3Y+Y+Position Input.ADC input Channel 2.4XX Position Input5YY Position Input6GNDGround7IN3Auxiliary Input 1.ADC input Channel 3.8IN4Auxiliary Input 2.ADC input Channel 4.9VREFVo

8、ltage Reference Input10+VCCPower Supply,2.7V to 5V.11PENIRQPen Interrupt.Open anode output(requires 10kto 100k pull-up resistor externally).12DOUTSerial Data Output.Data is shifted on the fallingedge of DCLK.This output is high impedancewhen CS is HIGH.13BUSYBusy Output.This output is high impedance

9、 whenCS is HIGH.14DINSerial Data Input.If CS is LOW,data is latched onrising edge of DCLK.15CSChip Select Input.Controls conversion timing andenables the serial input/output register.16DCLKExternal Clock Input.This clock runs the SAR con-version process and synchronizes serial data I/O.ABSOLUTE MAXI

10、MUM RATINGS(1)+VCC to GND.0.3V to+6VAnalog Inputs to GND.0.3V to+VCC+0.3VDigital Inputs to GND.0.3V to+VCC+0.3VPower Dissipation.250mWMaximum Junction Temperature.+150COperating Temperature Range.40C to+85CStorage Temperature Range.65C to+150CLead Temperature(soldering,10s).+300CNOTE:(1)Stresses abo

11、ve those listed under“Absolute Maximum Ratings”may cause permanent damage to the device.Exposure to absolute maximumconditions for extended periods may affect device reliability.ELECTROSTATICDISCHARGE SENSITIVITYThis integrated circuit can be damaged by ESD.Texas Instru-ments recommends that all int

12、egrated circuits be handled withappropriate precautions.Failure to observe proper handlingand installation procedures can cause damage.ESD damage can range from subtle performance degradationto complete device failure.Precision integrated circuits may bemore susceptible to damage because very small

13、parametricchanges could cause the device not to meet its publishedspecifications.12345678+VCCX+Y+XYGNDIN3IN4DCLKCSDINBUSYDOUTPENIRQ+VCCVREF161514131211109ADS7843PIN CONFIGURATIONTop ViewSSOPPIN DESCRIPTIONMAXIMUMINTEGRALSPECIFIEDLINEARITYPACKAGETEMPERATUREPACKAGEORDERINGTRANSPORTPRODUCTERROR(LSB)PAC

14、KAGE-LEADDESIGNATOR(1)RANGEMARKINGNUMBERMEDIA,QUANTITYADS7843E2SSOP-16DBQ40C to+85CADS7843EADS7843ERails,100ADS7843EADS7843E/2K5Tape and Reel,2500NOTES:(1)For the most current specifications and package information,refer to our web site at .PACKAGE/ORDERING INFORMATIONADS78433SBAS090BPARAMETERCONDIT

15、IONSMINTYPMAXUNITSANALOG INPUTFull-Scale Input SpanPositive Input Negative Input0VREFVAbsolute Input RangePositive Input0.2+VCC+0.2VNegative Input0.2+0.2VCapacitance25pFLeakage Current0.1ASYSTEM PERFORMANCEResolution12BitsNo Missing Codes11BitsIntegral Linearity Error2LSB(1)Offset Error6LSBOffset Er

16、ror Match0.11.0LSBGain Error4LSBGain Error Match0.11.0LSBNoise30VrmsPower-Supply Rejection70dBSAMPLING DYNAMICSConversion Time12Clk CyclesAcquisition Time3Clk CyclesThroughput Rate125kHzMultiplexer Settling Time500nsAperture Delay30nsAperture Jitter100psChannel-to-Channel IsolationVIN=2.5Vp-p at 50k

17、Hz100dBSWITCH DRIVERSOn-ResistanceY+,X+5Y,X6REFERENCE INPUTRange1.0+VCCVResistanceCS=GND or+VCC5GInput Current1340AfSAMPLE=12.5kHz2.5ACS=+VCC0.0013ADIGITAL INPUT/OUTPUTLogic FamilyCMOSLogic Levels,Except PENIRQVIH|IIH|+5A+VCC 0.7+VCC+0.3VIL|IIL|+5A0.3+0.8VVOHIOH=250A+VCC 0.8VVOLIOL=250A0.4VPENIRQVOL

18、TA=0C to+85C,100k Pull-Up0.8VData FormatStraight BinaryPOWER-SUPPLY REQUIREMENTS+VCCSpecified Performance2.73.6VQuiescent Current280650AfSAMPLE=12.5kHz220AShutdown Mode with3ADCLK=DIN=+VCCPower Dissipation+VCC=+2.7V1.8mWTEMPERATURE RANGESpecified Performance40+85CELECTRICAL CHARACTERISTICSAt TA=40C

19、to+85C,+VCC=+2.7V,VREF=+2.5V,fSAMPLE=125kHz,fCLK=16 fSAMPLE=2MHz,12-bit mode,and digital inputs=GND or+VCC,unless otherwisenoted.ADS7843ENOTE:(1)LSB means Least Significant Bit.With VREF equal to+2.5V,1LSB is 610V.ADS78434SBAS090BTYPICAL CHARACTERISTICSAt TA=+25C,+VCC=+2.7V,VREF=+2.5V,fSAMPLE=125kHz

20、,and fCLK=16 fSAMPLE=2MHz,unless otherwise noted.SUPPLY CURRENT vs+VCC3.5252.54+VCC(V)Supply Current(A)3203002802602402202001804.53fSAMPLE=12.5kHz VREF=+VCC MAXIMUM SAMPLE RATE vs+VCC3.5252.54+VCC(V)Sample Rate(Hz)1M100k10k1k4.53VREF=+VCC SUPPLY CURRENT vs TEMPERATURE204010020040Temperature(C)Supply

21、 Current(A)4003503002502001501006080CHANGE IN GAIN vs TEMPERATURE204010020040Temperature(C)Delta from+25C(LSB)0.150.100.050.000.050.100.156080CHANGE IN OFFSET vs TEMPERATURE204010020040Temperature(C)Delta from+25C(LSB)0.60.40.20.00.20.40.66080POWER-DOWN SUPPLY CURRENT vs TEMPERATURE204010020040Tempe

22、rature(C)Supply Current(nA)140120100806040206080ADS78435SBAS090BTYPICAL CHARACTERISTICS(Cont.)At TA=+25C,+VCC=+2.7V,VREF=+2.5V,fSAMPLE=125kHz,and fCLK=16 fSAMPLE=2MHz,unless otherwise noted.REFERENCE CURRENT vs SAMPLE RATE7501252550100Sample Rate(kHz)Reference Current(A)14121086420REFERENCE CURRENT

23、vs TEMPERATURE204010020040Temperature(C)Reference Current(A)1816141210866080SWITCH-ON RESISTANCE vs+VCC(X+,Y+:+VCC to Pin;X,Y:Pin to GND)3.5252.5X+Y+YX4+VCC(V)RON()187654324.53SWITCH-ON RESISTANCE vs TEMPERATURE(X+,Y+:+VCC to Pin;X,Y:Pin to GND)204010020X+Y+YX40Temperature(C)RON()187654326080021.81.

24、61.41.210.80.60.40.20LSB Error20406080100120140160180200Sampling Rate(kHz)MAXIMUM SAMPLING RATE vs RININL:R=2kINL:R=500DNL:R=2kDNL:R=500ADS78436SBAS090B+VCCX+Y+XYGNDIN3IN412345678161514131211109DCLKCSDINBUSYDOUTPENIRQ+VCCVREFSerial/Conversion ClockChip SelectSerial Data InConverter StatusSerial Data

25、 Out+1F to 10F(Optional)+2.7V to+5VADS7843Auxiliary InputsTouch Screen0.1FPen Interrupt100k(optional)0.1FTHEORY OF OPERATIONThe ADS7843 is a classic Successive Approximation Regis-ter(SAR)ADC.The architecture is based on capacitiveredistribution which inherently includes a sample-and-holdfunction.Th

26、e converter is fabricated on a 0.6s CMOSprocess.The basic operation of the ADS7843 is shown in Figure 1.The device requires an external reference and an externalclock.It operates from a single supply of 2.7V to 5.25V.Theexternal reference can be any voltage between 1V and+VCC.The value of the refere

27、nce voltage directly sets the inputrange of the converter.The average reference input currentdepends on the conversion rate of the ADS7843.The analog input to the converter is provided via a four-channel multiplexer.A unique configuration of low on-resis-tance switches allows an unselected ADC input

28、 channel toprovide power and an accompanying pin to provide ground foran external device.By maintaining a differential input to theconverter and a differential reference architecture,it is pos-sible to negate the switchs on-resistance error(should this bea source of error for the particular measurem

29、ent).ANALOG INPUTSee Figure 2 for a block diagram of the input multiplexer on theADS7843,the differential input of the ADC,and the convertersdifferential reference.Table I and Table II show the relation-ship between the A2,A1,A0,and SER/DFR control bits andthe configuration of the ADS7843.The contro

30、l bits are pro-vided serially via the DIN pinsee the Digital Interface sectionof this data sheet for more details.When the converter enters the hold mode,the voltagedifference between the+IN and IN inputs(see Figure 2)iscaptured on the internal capacitor array.The input current onthe analog inputs d

31、epends on the conversion rate of thedevice.During the sample period,the source must chargethe internal sampling capacitor(typically 25pF).After thecapacitor has been fully charged,there is no further inputcurrent.The rate of charge transfer from the analog sourceto the converter is a function of con

32、version rate.A2A1A0X+Y+IN3IN4IN(1)X SWITCHESY SWITCHES+REF(1)REF(1)001+INGNDOFFON+VREFGND101+INGNDONOFF+VREFGND010+INGNDOFFOFF+VREFGND110+INGNDOFFOFF+VREFGNDTABLE I.Input Configuration,Single-Ended Reference Mode(SER/DFR HIGH).NOTE:(1)Internal node,for clarification onlynot directly accessible by th

33、e user.A2A1A0X+Y+IN3IN4IN(1)X SWITCHESY SWITCHES+REF(1)REF(1)001+INYOFFON+YY101+INXONOFF+XX010+INGNDOFFOFF+VREFGND110+INGNDOFFOFF+VREFGNDNOTE:(1)Internal node,for clarification onlynot directly accessible by the user.TABLE II.Input Configuration,Differential Reference Mode(SER/DFR LOW).FIGURE 1.Basi

34、c Operation of the ADS7843.ADS78437SBAS090BFIGURE 2.Simplified Diagram of Analog Input.REFERENCE INPUTThe voltage difference between+REF and REF(shown inFigure 2)sets the analog input range.The ADS7843 willoperate with a reference in the range of 1V to+VCC.There areseveral critical items concerning

35、the reference input and itswide voltage range.As the reference voltage is reduced,theanalog voltage weight of each digital output code is alsoreduced.This is often referred to as the LSB(least significantbit)size and is equal to the reference voltage divided by 4096.Any offset or gain error inherent

36、 in the ADC will appear toincrease,in terms of LSB size,as the reference voltage isreduced.For example,if the offset of a given converter is2LSBs with a 2.5V reference,it will typically be 5LSBs with a1V reference.In each case,the actual offset of the device isthe same,1.22mV.With a lower reference

37、voltage,more caremust be taken to provide a clean layout including adequatebypassing,a clean(low noise,low ripple)power supply,a low-noise reference,and a low-noise input signal.The voltage into the VREF input is not buffered and directlydrives the Capacitor Digital-to-Analog Converter(CDAC)por-tion

38、 of the ADS7843.Typically,the input current is 13A withVREF=2.7V and fSAMPLE=125kHz.This value will vary by afew microamps depending on the result of the conversion.Thereference current diminishes directly with both conversion rateand reference voltage.As the current from the reference isdrawn on ea

39、ch bit decision,clocking the converter morequickly during a given conversion period will not reduce overallcurrent drain from the reference.There is also a critical item regarding the reference whenmaking measurements where the switch drivers are on.Forthis discussion,its useful to consider the basi

40、c operation ofthe ADS7843 as shown in Figure 1.This particular applica-tion shows the device being used to digitize a resistivetouch screen.A measurement of the current Y position ofthe pointing device is made by connecting the X+input tothe ADC,turning on the Y+and Y drivers,and digitizing thevolta

41、ge on X+(shown in Figure 3).For this measurement,the resistance in the X+lead does not affect the conversion(it does affect the settling time,but the resistance is usuallysmall enough that this is not a concern).FIGURE 3.Simplified Diagram of Single-Ended Reference(SER/DFR HIGH,Y Switches Enabled,X+

42、isAnalog Input).Converter+IN+REFY+VCCVREFX+YGNDREFINCONVERTERREF+REF+INININ3IN4GNDA2-A0(Shown 001B)SER/DFR(Shown HIGH)X+X+VCCPENIRQY+YVREFADS78438SBAS090BFIGURE 5.Conversion Timing,24 Clocks per Conversion,8-bit Bus Interface.No DCLK Delay Required with DedicatedSerial Port.However,since the resista

43、nce between Y+and Y is fairly low,the on-resistance of the Y drivers does make a small differ-ence.Under the situation outlined so far,it would not bepossible to achieve a 0V input or a full-scale input regardlessof where the pointing device is on the touch screen becausesome voltage is lost across

44、the internal switches.In addition,the internal switch resistance is unlikely to track the resistanceof the touch screen,providing an additional source of error.This situation can be remedied as shown in Figure 4.By settingthe SER/DFR bit LOW,the+REF and REF inputs areconnected directly to Y+and Y.Th

45、is makes the A/D conver-sion ratiometric.The result of the conversion is always apercentage of the external resistance,regardless of how itchanges in relation to the on-resistance of the internalConverter+IN+REFY+VCCX+YGNDREFINFIGURE 4.Simplified Diagram of Differential Reference(SER/DFR LOW,Y Switc

46、hes Enabled,X+is AnalogInput).switches.Note that there is an important consideration regard-ing power dissipation when using the ratiometric mode ofoperation,see the Power Dissipation section for more details.As a final note about the differential reference mode,it must beused with+VCC as the source

47、 of the+REF voltage and cannotbe used with VREF.It is possible to use a high precisionreference on VREF and single-ended reference mode for mea-surements which do not need to be ratiometric.Or,in somecases,it could be possible to power the converter directly froma precision reference.Most references

48、 can provide enoughpower for the ADS7843,but they might not be able to supplyenough current for the external load(such as a resistive touchscreen).DIGITAL INTERFACEFigure 5 shows the typical operation of the ADS7843s digitalinterface.This diagram assumes that the source of the digitalsignals is a mi

49、crocontroller or digital signal processor with abasic serial interface.Each communication between the pro-cessor and the converter consists of eight clock cycles.Onecomplete conversion can be accomplished with three serialcommunications,for a total of 24 clock cycles on the DCLKinput.The first eight

50、 clock cycles are used to provide the control bytevia the DIN pin.When the converter has enough informationabout the following conversion to set the input multiplexer,switches,and reference inputs appropriately,the converterenters the acquisition(sample)mode and,if needed,theinternal switches are tu