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1、C-System Introduction will cover Role&Responsibility(R&R)Process Cx Stage:C0:Proposal phase 構想階段 C1:Planning phase 規劃階段 C2:R&D Design phase 設計階段 C3:Lab Pilot Run phase 樣品試作階段 C4:Eng Pilot Run phase 工程試作階段 C5:PD Pilot Run phase 試產階段 C6:Mass Production phase 量產階段Role&ResponsibilityFunction Responsibil
2、ityPM 產品經理-Product Manager(或計畫專案經理-Project Manager)為所負責計畫或產品線成敗之總負責人,將依產品線之性質指定專人負責某類產品,必須對所負責產品線專業領域之發展及行銷雙方面皆有相當程度的了解.並依照產品之條件及市場狀況,做適當的運用,訂定技術或產品市場競爭策略,並在適當的時機推出適當之技術或產品.TM TMisresponsibletocoordinatetechnicalissuesconflictamongHW,SW,IDandMEanddecision-making.TMhastohandleallprojecttechnicalissue
3、s.PCC 為規劃推廣、連絡及控制專案進行的負責人,掌握專案進行之情況以協助處理異常狀況,使新產品能順暢切入工廠且如期推出,以提高產品競爭力.協助 R&D RELEASE 開發階段 BOM CHANGE NOTICE.R&D R&D 包括電子部門及工業設計部門,若只寫 HW(Hardware Design)則指電子部門,若只寫 ID(INDUSTRIAL DESIGN)則指工業設計部門;包括ME,Thermal,Packing design.若只寫 SW(Software design)則指軟體設計部門有負責 BIOS,Driver 及 Pre-load 不同工作性質之軟體開發功能.R&D 人
4、員負責產品之開發、設計、測試規劃,包括 H/W、S/W及ID的開發、設計、提出新發明及著作權揭露書.-Wistron CaseRole&ResponsibilityFunction ResponsibilityHW(Hardware Design)*HardwareisresponsibleforElectronicEngineeringDesign*Co-works with S/W and QT to make sure that the every function works wellaccordingtospec.*H/Wshouldconducttechnicaltransfert
5、oPE.*H/Wshouldinput,update,andmaintainthebugs/issuesinformationinthebugtrackingsystem.SW(Software Design)*SoftwareisresponsibleforthedesignofBIOS,Driver,Utilities,andS/WPreload.*S/Wco-workswithH/WandQTtomakesurethateveryfunctionworkswellaccordingtothespecification.*S/WhastoreleasetheSCDandtheCert.Te
6、amDocument.*S/WshouldconducttechnicaltransfertoTE.*S/Whastoinput/update/maintainthebugs/issuesinformationinthebugtrackingsystem.ID/ME(Industrial Design/Mechanical Engineering)*ID/MEisresponsibleforMechanicalEngineering,ThermalandPackingdesigns.*ID/MEshouldconducttechnicaltransfertoPME.*ID/MEshouldin
7、put,update,andmaintainthebugs/issuesinformationinthebugtrackingsystemused.-Wistron CaseRole&ResponsibilityFunction ResponsibilityPA(EMI/Safety,QT,CE/Reliability,PCB,OS Certification)為產品保證暨開發支援Function之總稱,主要負責根據 MRS/PES 執行各項產品之測試,諸如 EMC/Safety:REGULATORY TEST,CE:RELIABILITY TEST 及 KEY COMPONENT APPRO
8、VAL,PCB:PCB LAYOUT,DC:BOM,OS:OS 認證 etc;EMC/Safety All products to meet EMC/Safety requirements and guarantee the legality in the international marketing.申請產品之安規、測試、Debug.QT 為R&D轄下所屬之測試單位人員,主要負責各項產品之測試,諸如COMPATIBILITY TEST,SOFTWARE TEST,S/W PRELOAD TEST,DIAGNOSTIC PROGRAM TEST,ETC.,CE/Reliability 組件承
9、認測試、不良品故障分析及其他附件等材料品質之管制及保證 產品相關之可靠度與環境實驗,以及可靠度工程之研究與制定.PCB PCB Layout之申請、PCB之設計、Orcad library&Mentor library的建立與管理.信號品質CAE分析,PCB layout外包廠商之管理,PCB製造廠商之管理.OS Certification 執行公司各產品之 OS 相容性認證測試及 LOGO 申請.O.S.Beta Site 測試 PDM 料號編碼及控管,BOM製作-Wistron CaseRole&ResponsibilityFunction ResponsibilityAM(Account
10、 Manager)1.爭取訂單與客戶合約協商.2.協調產品SPEC.工程變更 SAMPLE APPROVAL.3.適時反應市場需求與趨勢.MM(Material Management)1.MMisresponsiblefornewsupplierdevelopment,partspurchasing2.Controllingmechanicaltoolingstatusincludingtheschedule,capacity,partsreadiness,concerns3.Managethedependencies,longlead-timeitems.4.MMalsoco-workswi
11、thSQMandCEforcomponentqualityimprovementandthekeycomponentQVLfinalversionSQM(Supplier Quality Management)*零件品質管理及參與分包商之評鑑/管理(SQRC Plan/Status)*負責異常材料分析、追蹤與改善.*負責進行產品QVLCANDIDATEAPPROVAL作業系統ATmfg.GCSD 1.開發及推動全球客戶服務及支援計劃.2.各項售後服務及支援作業.3.參與 Field 品質改善作業(EWG)FI 負責評估 Project Cost,決定 Project 是否可行以及 Projec
12、t 所花費之 Cost.Legal 合約及專利審核-Wistron CaseRole&ResponsibilityFunction ResponsibilityCFECFE acts on behalf of Wistron global manufacturing operation to deal with thecustomer,and also acts as a representative of the customer when dealing withinternalWistronteams.BasedontheC4/C5checklist,relatedreportsandp
13、rojectstatus,CFEisresponsibletoconcludetheexitjudgment(ReadyorNotready)duringC4/C5ExitmeetingstodeterminewhetheraproductcanmoveontoPDpilotrun/MPornotNPI 1.負責規劃、協調、整合與提供各Site製造所需相關資訊與技術資料2.協調安排新產品轉移至海外生產工廠 3.協調處理海外生產工廠發生之生產相關問題 PE/PME 1.產品設計審查,產品問題之發覺及產品移交.2.協助生產良率提昇,克服生產瓶頸,提高生產力.3.協助訂定製造規格及引進新的製作技術,
14、進行改善以確保產品品質.IE 1.設計及管理一個高效率的整合製造系統.2.消除浪費、杜絕不合理,提高生產力3.生產流程規劃、製程改善、標準工時製定 QA 1.執行製程及產品之檢驗並反應品質報告請相關單位改善品質 2.收集及處理市場及客戶品質回饋資料反應相關單位改善品質 3.協助工程單位必要之驗證測試.4.建立PCBA,Final Assembly之檢驗標準QE 1.執行 DQA.FDI,MTBF,ORT Test2.執行產品開發過程之可靠度及環境測試(C4)3.協助工程測試驗證 4.品質工程問題分析與解決-Wistron CaseRole&ResponsibilityFunction Resp
15、onsibilityPD(Production)PDhastoworkwithPE,PMEandIErespectivelytogettestingequipment&tools,assemblytools,andSOPreadybeforeC5Exit.PDisresponsibletoproducetheproduct.PDisnotjustforefficiencyonlybutalsoquality.PSE(Process Engineer)PSEisresponsibleforSMTprocessandforreleasingtheSMTpilotrunreport.PSEisals
16、oresponsiblefortheprocesscontinuousimprovement(CIP).FAE(Failure Analysis Engineer)or REFAEisresponsibleforissuingthefailureanalysisreportandforwardingthistorelateddepartmentsforproductqualityimprovement.FAEisalsoresponsibleforpreparingrepairSOPifapplicable.TE TE is responsible for providing and main
17、taining Test Plan and TestProgram.TEalsoimplementallthepreloadtoproductionlineandreporttheproblemsrelatedtopreloadtopreloadteam.PMC/GPMC(Plan Material Control/Global Plan Material Control)GPMC/PMC is responsible for product fulfillment,final shipping model,supplysiteandcapacityplan,andrampupplanfora
18、llsites.-Wistron CaseWistron C-System Quality ControlProposalPhasePlanningPhaseR&DDesignPhaseLabPilot-runPhaseEngineeringPilot-runPhaseProductionPilot-runPhaseMassProductionPhaseC0 C1 C2 C3 C4C5CheckPointWistron C-PhaseNPIFDI/MTBFDQA/PQC/FQC Compatibility/Diagnostic-Simulation Test-Layout&drawing-Si
19、gnal Integrity-DFX Check-AVL-C-Test Plans Reliability/Stress EMI/Safety OS&Pre-LoadWIH/WPH/WZS/WKS-MRS Check-Service Cost Estimate-Simulation-Design Peer Review-Lessons LearnedAvailability Develop Plan Launch FAI&SPCMTBFDemoCIP/CLCAPareto AnalysisEWG ReadyAFRTest ReportsPre-QVL ReadyDiagnostics Prog
20、ramBug List&ActionDCN/ECN/ECR FAI report PFMEASQRCTrainingMTBF ReviewQMP/QPA/QSAFPYRPPAPServiceability DesignTest PlansIntegrate Design Review Signal QualityDFX IndexInitial Supplier AuditMemorandumDFMEASimulationMTBF EstimateMVPConcept/ProposalMRSDefinitionScopeSCEInvestigation&ProposalDesign&Sourc
21、ingIntegrationValidationReleaseProduct Life CycleMDRR/C4 MDRR/C4Go/No Go?Go/No Go?MRR/C5 MRR/C5Go/No Go?Go/No Go?C6OOB/OBAORT/StressEWG/FQHAFR/DOANew C System ArchitectureProgressC0 ExitC0 ActivityC0 EntryC1 ExitC1 ActivityC1 EntryC2 ExitC2 ActivityC2 EntryC3 ExitC3 ActivityC3 EntryC4 ExitC4 ActivityC4 EntryC5 ExitC5 ActivityC5 EntryC6 ExitC6 ActivityC6 EntryTimeDetail ActivitiesSubjectScopeDefinitionProcedure.Activities DefinitionRecord&Report Format DefinitionEscalation RuleMeasurementStandardProject Management&System Maintenance
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