IEEE Std 1149.1-2013原版完整文件.docx
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1、IEEE Standard for Test Access Port and Boundary-Scan ArchitectureIEEE Computer SocietySponsored by theTest Technology Standards CommitteeAuthorized licensed use limited to: University of Virginia Libraries. Downloaded on June 18,2014 at 05:29:00 UTC from IEEE Xplore. Restrictions apply.IEEE3 Park Av
2、enueNew York, NY 10016-5997 USA13 May 2013IEEE Std 1149.1-2013(Revision of IEEE Std 1149.1-2001)IEEE Std 1149.1TM-2013(Revision of IEEE Std 1149.1-2001)IEEE Standard for Test Access Port and Boundary-Scan ArchitectureSponsorTest Technology Standards Committeeof theIEEE Computer SocietyApproved 6 Feb
3、ruary 2013IEEE-SA Standards BoardAbstract: Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards and the test of internal circuits is defined. The circuitry includes a standard interface through which instructions an
4、d test data are communicated. A set of test features is defined, including a boundary-scan register, such that the component is able to respond to a minimum set of instructions designed to assist with testing of assembled printed circuit boards. Also, a language is defined that allows rigorous struc
5、tural description of the component-specific aspects of such testability features, and a second language is defined that allows rigorous procedural description of how the testability features may be used.Keywords: boundary scan, boundary-scan architecture, Boundary-Scan Description Language (BSDL), b
6、oundary-scan register, circuit boards, circuitry, IEEE 1149.1TM, integrated circuit, printed circuit boards, Procedural Description Language (PDL), test, test access port (TAP), very high speed integrated circuit (VHSIC), VHSIC Hardware Description Language (VHDL).Notice and Disclaimer of Liability
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